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foss-fpga-tools / symbiflow-arch-defs / refs/heads/bot-conda-lock-update / . / xilinx / xc7 / tests / iddr_oddr
tree: 448e310937ff69adb7ab669ca303d54c288de699 [path history] [tgz]
  1. CMakeLists.txt
  2. data_generator.v
  3. iddr_basys3.v
  4. iddr_basys3.xdc
  5. iddr_wrapper.v
  6. ioddr_hw_test_basys3.pcf
  7. ioddr_hw_test_basys3.v
  8. ioddr_tester.v
  9. oddr_basys3.v
  10. oddr_basys3.xdc
  11. oddr_wrapper.v
  12. README.md
  13. tddr_basys3.pcf
  14. tddr_basys3.v
xilinx/xc7/tests/iddr_oddr/README.md

IDDR/ODDR test

These tests are meant to check correct support for IDDR and ODDR primitives as well as their operation in real hardware.

The hardware test

  1. Build the test named ioddr_hw_test_basys3 and upload the bitstream to a Basys3 board
  2. Make wire loop connections on JC connector so that pins 1,7 2,8 3,9 and 4,10 are shorted.

LED7 should blink continuously indicating that the bitstream is working.

LEDs 0 to 3 indicate error in data transmission. They all should remain off while the shorting wires are connected.