)]}'
{
  "commit": "54c4c1ee44950469b6b1b7721eb825fcf7d3431f",
  "tree": "f64003195380ff4786bc07a104b32ee9ffb0bc9e",
  "parents": [
    "34008841c1b7cf4caa9598f4ea529f7d08940aca"
  ],
  "author": {
    "name": "Unai Martinez-Corral",
    "email": "umartinezcorral@antmicro.com",
    "time": "Tue Feb 07 21:34:39 2023 +0100"
  },
  "committer": {
    "name": "Unai Martinez-Corral",
    "email": "umartinezcorral@antmicro.com",
    "time": "Tue Feb 07 21:34:39 2023 +0100"
  },
  "message": "f4pga: run black\n\nSigned-off-by: Unai Martinez-Corral \u003cumartinezcorral@antmicro.com\u003e\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "6c779d92ea41a46020afe7dc4d3c739ef50fd503",
      "old_mode": 33188,
      "old_path": "f4pga/utils/pcf.py",
      "new_id": "8490973d4af98ef95e828a14b253487d9cf4522a",
      "new_mode": 33188,
      "new_path": "f4pga/utils/pcf.py"
    },
    {
      "type": "modify",
      "old_id": "1b27d83fb76c5fff131c5814b17931c83e5e0815",
      "old_mode": 33188,
      "old_path": "f4pga/utils/quicklogic/convert_compile_opts.py",
      "new_id": "b26a1ab730062b55f4c883a43fe124a8b4185c3b",
      "new_mode": 33188,
      "new_path": "f4pga/utils/quicklogic/convert_compile_opts.py"
    },
    {
      "type": "modify",
      "old_id": "e438e1a3c3c6cf5d060e4a92aaad84a309f9c599",
      "old_mode": 33261,
      "old_path": "f4pga/utils/quicklogic/pp3/arch_import.py",
      "new_id": "a16878945bd1a39bd7f074a1ffb57ec95d99ea88",
      "new_mode": 33261,
      "new_path": "f4pga/utils/quicklogic/pp3/arch_import.py"
    },
    {
      "type": "modify",
      "old_id": "f390bc80d825705e6140bf471dd3c2b1af7d6517",
      "old_mode": 33188,
      "old_path": "f4pga/utils/quicklogic/pp3/connections.py",
      "new_id": "579354a3155c8ad7efa6fc125c2b52de806d2b42",
      "new_mode": 33188,
      "new_path": "f4pga/utils/quicklogic/pp3/connections.py"
    },
    {
      "type": "modify",
      "old_id": "af563e6e6ee6e2bcdd984133b3dfb417fd567171",
      "old_mode": 33261,
      "old_path": "f4pga/utils/quicklogic/pp3/create_default_fasm.py",
      "new_id": "2b9844e9967d6f06e0c9251067d708bec757cccc",
      "new_mode": 33261,
      "new_path": "f4pga/utils/quicklogic/pp3/create_default_fasm.py"
    },
    {
      "type": "modify",
      "old_id": "beab080e4db962b79e02304222b22090839b1b9b",
      "old_mode": 33261,
      "old_path": "f4pga/utils/quicklogic/pp3/create_ioplace.py",
      "new_id": "1bf66253c8d5e9590ae5b9789e4ece570992fdb5",
      "new_mode": 33261,
      "new_path": "f4pga/utils/quicklogic/pp3/create_ioplace.py"
    },
    {
      "type": "modify",
      "old_id": "72189b98d0fa8c7b968c4b9f1b7fd2d1b6e0e53f",
      "old_mode": 33261,
      "old_path": "f4pga/utils/quicklogic/pp3/create_place_constraints.py",
      "new_id": "03fe6c0c6452468add5555b1eb8a603a498ddc2d",
      "new_mode": 33261,
      "new_path": "f4pga/utils/quicklogic/pp3/create_place_constraints.py"
    },
    {
      "type": "modify",
      "old_id": "cdbcc97ab4230c0ebd0ea9d2a2763b0d211bef92",
      "old_mode": 33261,
      "old_path": "f4pga/utils/quicklogic/pp3/data_import.py",
      "new_id": "6b7693b6df3479c4238bee282f929847712c61ef",
      "new_mode": 33261,
      "new_path": "f4pga/utils/quicklogic/pp3/data_import.py"
    },
    {
      "type": "modify",
      "old_id": "4ddc344eea09e824bceb556d72ba806435590101",
      "old_mode": 33261,
      "old_path": "f4pga/utils/quicklogic/pp3/eos-s3/iomux_config.py",
      "new_id": "be5cf3bfb23d9894f4bddf167ff652dec61eb0db",
      "new_mode": 33261,
      "new_path": "f4pga/utils/quicklogic/pp3/eos-s3/iomux_config.py"
    },
    {
      "type": "modify",
      "old_id": "a1ba1958686cdb55cd8617c78e6b90b79ebe0c49",
      "old_mode": 33188,
      "old_path": "f4pga/utils/quicklogic/pp3/fasm2bels.py",
      "new_id": "291c2142f737724c39daba5d57e44c6903ef9b5c",
      "new_mode": 33188,
      "new_path": "f4pga/utils/quicklogic/pp3/fasm2bels.py"
    },
    {
      "type": "modify",
      "old_id": "ac812ae4af5eea884ca3d9843f1a834a0b7ec0c1",
      "old_mode": 33261,
      "old_path": "f4pga/utils/quicklogic/pp3/prepare_vpr_database.py",
      "new_id": "ad0bcb0b1835f4d95ef4a9db9607cf628e142ff2",
      "new_mode": 33261,
      "new_path": "f4pga/utils/quicklogic/pp3/prepare_vpr_database.py"
    },
    {
      "type": "modify",
      "old_id": "a6f1b94978c91f5a355bd6505bc45c3db4c7beef",
      "old_mode": 33261,
      "old_path": "f4pga/utils/quicklogic/pp3/routing_import.py",
      "new_id": "058403ac4b441ade3eb20e3d1df112245223af71",
      "new_mode": 33261,
      "new_path": "f4pga/utils/quicklogic/pp3/routing_import.py"
    },
    {
      "type": "modify",
      "old_id": "aff215534ff0c3430da29d6be278cce7cd759ce5",
      "old_mode": 33188,
      "old_path": "f4pga/utils/quicklogic/pp3/rr_utils.py",
      "new_id": "87d4ee92bc8d31aee899bfedf9cc62137d1aee04",
      "new_mode": 33188,
      "new_path": "f4pga/utils/quicklogic/pp3/rr_utils.py"
    },
    {
      "type": "modify",
      "old_id": "970dc2890077fe3c9ebc8de5a595f73b999b473c",
      "old_mode": 33188,
      "old_path": "f4pga/utils/quicklogic/pp3/switchbox_model.py",
      "new_id": "d0ba6b6c163bcf13b35e5671bb8fe7c6da509bc8",
      "new_mode": 33188,
      "new_path": "f4pga/utils/quicklogic/pp3/switchbox_model.py"
    },
    {
      "type": "modify",
      "old_id": "3d6f8faf962d7ea67579a7dee806f8fe97100723",
      "old_mode": 33188,
      "old_path": "f4pga/utils/quicklogic/pp3/tile_import.py",
      "new_id": "f8df6c4d5a665c1acbf2e1c5d240fc579061d402",
      "new_mode": 33188,
      "new_path": "f4pga/utils/quicklogic/pp3/tile_import.py"
    },
    {
      "type": "modify",
      "old_id": "e3fe5daaf12d13091b01d5d717bcd563c98575db",
      "old_mode": 33188,
      "old_path": "f4pga/utils/quicklogic/pp3/timing.py",
      "new_id": "2fb6211267c8d6e8b1ae048579ffcc7609fcdb2b",
      "new_mode": 33188,
      "new_path": "f4pga/utils/quicklogic/pp3/timing.py"
    },
    {
      "type": "modify",
      "old_id": "8615a53713c4c57a1c6772a811677f7b3a6c6a18",
      "old_mode": 33188,
      "old_path": "f4pga/utils/quicklogic/pp3/verilogmodule.py",
      "new_id": "580e1b7700ed597303d17478638b8e844b89d4d2",
      "new_mode": 33188,
      "new_path": "f4pga/utils/quicklogic/pp3/verilogmodule.py"
    },
    {
      "type": "modify",
      "old_id": "70362cae4128836c794aeba6ae131adbea97b3be",
      "old_mode": 33261,
      "old_path": "f4pga/utils/quicklogic/pp3/vis_switchboxes.py",
      "new_id": "5ae30fd25d3514c4599806dd2594b7579507ee91",
      "new_mode": 33261,
      "new_path": "f4pga/utils/quicklogic/pp3/vis_switchboxes.py"
    },
    {
      "type": "modify",
      "old_id": "1744a9bf395109aeaca0b3023f17acf6180801f0",
      "old_mode": 33188,
      "old_path": "f4pga/utils/quicklogic/process_sdc_constraints.py",
      "new_id": "87f09c0e33b5c9c26beab4b0ee58bd5623b91886",
      "new_mode": 33188,
      "new_path": "f4pga/utils/quicklogic/process_sdc_constraints.py"
    },
    {
      "type": "modify",
      "old_id": "5605b9eaca6d08d65d24aa675e0e89589af542c8",
      "old_mode": 33188,
      "old_path": "f4pga/utils/quicklogic/repacker/arch_xml_utils.py",
      "new_id": "5403165a218550c6b5272a63d02e95013403e07b",
      "new_mode": 33188,
      "new_path": "f4pga/utils/quicklogic/repacker/arch_xml_utils.py"
    },
    {
      "type": "modify",
      "old_id": "e2a2485d7a7d59b58892a9958532edbedae5d9de",
      "old_mode": 33188,
      "old_path": "f4pga/utils/quicklogic/repacker/eblif_netlist.py",
      "new_id": "0f998e4be45dec77b2ad7ae37c0987411462b20b",
      "new_mode": 33188,
      "new_path": "f4pga/utils/quicklogic/repacker/eblif_netlist.py"
    },
    {
      "type": "modify",
      "old_id": "e69ce5c8cd0f361238e77d3989dff3cb272625c1",
      "old_mode": 33188,
      "old_path": "f4pga/utils/quicklogic/repacker/netlist_cleaning.py",
      "new_id": "bb7e01531578430166600a2528ca8f506909b85e",
      "new_mode": 33188,
      "new_path": "f4pga/utils/quicklogic/repacker/netlist_cleaning.py"
    },
    {
      "type": "modify",
      "old_id": "47454f027faf411fac59a8945d25ea9080072d84",
      "old_mode": 33188,
      "old_path": "f4pga/utils/quicklogic/repacker/packed_netlist.py",
      "new_id": "e57e8a54640ef17383f67aafad8bbcf816438565",
      "new_mode": 33188,
      "new_path": "f4pga/utils/quicklogic/repacker/packed_netlist.py"
    },
    {
      "type": "modify",
      "old_id": "f1046cbb3f87472636f37ab45fe4527d5336a36c",
      "old_mode": 33188,
      "old_path": "f4pga/utils/quicklogic/repacker/pb_rr_graph.py",
      "new_id": "2bbea5278d907525b84fbb948b0ea917847c90ad",
      "new_mode": 33188,
      "new_path": "f4pga/utils/quicklogic/repacker/pb_rr_graph.py"
    },
    {
      "type": "modify",
      "old_id": "98fd0bfaf1b86ee2f95c0d1c08b954b5fc1a6d90",
      "old_mode": 33188,
      "old_path": "f4pga/utils/quicklogic/repacker/pb_rr_graph_netlist.py",
      "new_id": "34f2e7afd1152c028616f0167fedc05dd92dc73a",
      "new_mode": 33188,
      "new_path": "f4pga/utils/quicklogic/repacker/pb_rr_graph_netlist.py"
    },
    {
      "type": "modify",
      "old_id": "8a6ce8eb01f56fc2135320e90b72d4b0f66cdce1",
      "old_mode": 33188,
      "old_path": "f4pga/utils/quicklogic/repacker/pb_rr_graph_router.py",
      "new_id": "40302e2c7375caa6f9bcebde5e352f06ffa8bf0d",
      "new_mode": 33188,
      "new_path": "f4pga/utils/quicklogic/repacker/pb_rr_graph_router.py"
    },
    {
      "type": "modify",
      "old_id": "0e58d09296a611b64f92d03af7eddfcd7fcb137c",
      "old_mode": 33188,
      "old_path": "f4pga/utils/quicklogic/repacker/pb_type.py",
      "new_id": "09b602fcbaab4d238121a0f9e232c15dbe0d7f26",
      "new_mode": 33188,
      "new_path": "f4pga/utils/quicklogic/repacker/pb_type.py"
    },
    {
      "type": "modify",
      "old_id": "5fc60990096743f55e8d51e51056e9ddc71a5d2b",
      "old_mode": 33261,
      "old_path": "f4pga/utils/quicklogic/repacker/repack.py",
      "new_id": "03701ba2f057e8f17d2822d4d1cb48aa58321a4c",
      "new_mode": 33261,
      "new_path": "f4pga/utils/quicklogic/repacker/repack.py"
    },
    {
      "type": "modify",
      "old_id": "d246dbe05516d845aa7f395386a4ecfc0388a993",
      "old_mode": 33188,
      "old_path": "f4pga/utils/quicklogic/repacker/tests/eblif_roundtrip/test_eblif_roundtrip.py",
      "new_id": "9530ed30611cd4e088fbdef66e5af67b9f767bfe",
      "new_mode": 33188,
      "new_path": "f4pga/utils/quicklogic/repacker/tests/eblif_roundtrip/test_eblif_roundtrip.py"
    },
    {
      "type": "modify",
      "old_id": "4528e41cc68da54626e15abf7cb79fa00a2b88fe",
      "old_mode": 33188,
      "old_path": "f4pga/utils/quicklogic/repacker/tests/lut_padding/test_lut_padding.py",
      "new_id": "8c66a5fecf0eb9828c6b4e6c5b4a2a55e3f04104",
      "new_mode": 33188,
      "new_path": "f4pga/utils/quicklogic/repacker/tests/lut_padding/test_lut_padding.py"
    },
    {
      "type": "modify",
      "old_id": "e7289253c7a2fa6c8d02cf4ba7ce2ab6ec7a8f5d",
      "old_mode": 33188,
      "old_path": "f4pga/utils/quicklogic/repacker/tests/packed_netlist_roundtrip/test_netlist_roundtrip.py",
      "new_id": "ff430757d38b4f8947fe11e8efd45e2ddd881dae",
      "new_mode": 33188,
      "new_path": "f4pga/utils/quicklogic/repacker/tests/packed_netlist_roundtrip/test_netlist_roundtrip.py"
    },
    {
      "type": "modify",
      "old_id": "011b89d42b3b99d62d640af4763e2001cf86d96f",
      "old_mode": 33188,
      "old_path": "f4pga/utils/quicklogic/yosys_fixup_cell_names.py",
      "new_id": "f39916f15ad85423cc7ec4b19bf9d72de7e32c8f",
      "new_mode": 33188,
      "new_path": "f4pga/utils/quicklogic/yosys_fixup_cell_names.py"
    },
    {
      "type": "modify",
      "old_id": "216da0043e70794542123e85381b03efa47b3b67",
      "old_mode": 33188,
      "old_path": "f4pga/utils/vpr_io_place.py",
      "new_id": "42757ae09fb71cc540c5e80daefa8d06a109bbaa",
      "new_mode": 33188,
      "new_path": "f4pga/utils/vpr_io_place.py"
    },
    {
      "type": "modify",
      "old_id": "706cfaad7ee7a6196f7428d1f234889b03b84604",
      "old_mode": 33188,
      "old_path": "f4pga/utils/xc7/create_ioplace.py",
      "new_id": "df0f7fee4530c8b603c3b3e396cb81e71d3ad207",
      "new_mode": 33188,
      "new_path": "f4pga/utils/xc7/create_ioplace.py"
    },
    {
      "type": "modify",
      "old_id": "5ee85d95fe380bf9905d9b8cadce55597330d00b",
      "old_mode": 33188,
      "old_path": "f4pga/utils/xc7/create_place_constraints.py",
      "new_id": "6b78be501375a79fe88d108c984928de51baf166",
      "new_mode": 33188,
      "new_path": "f4pga/utils/xc7/create_place_constraints.py"
    },
    {
      "type": "modify",
      "old_id": "a8ec19d5b47316cc7fe73e44002c1f9cf0496c07",
      "old_mode": 33188,
      "old_path": "f4pga/utils/xc7/fix_xc7_carry.py",
      "new_id": "d02246caf890a1b6bb9b115797e7bc6bd54c9e16",
      "new_mode": 33188,
      "new_path": "f4pga/utils/xc7/fix_xc7_carry.py"
    },
    {
      "type": "modify",
      "old_id": "d4fd30fd9af45306729125914e357f8ac4d52bf5",
      "old_mode": 33188,
      "old_path": "f4pga/utils/yosys_split_inouts.py",
      "new_id": "73fd1e2d0da42e2e9a9578404a5df7590373fc79",
      "new_mode": 33188,
      "new_path": "f4pga/utils/yosys_split_inouts.py"
    },
    {
      "type": "modify",
      "old_id": "b134a082fb696c0f57672045a5cbdcee309d927d",
      "old_mode": 33188,
      "old_path": "f4pga/wrappers/sh/__init__.py",
      "new_id": "4bace987148a09451a4bcdbd69537b164f7eaa31",
      "new_mode": 33188,
      "new_path": "f4pga/wrappers/sh/__init__.py"
    }
  ]
}
