| commit | 9c049e21ac8ad5d7719e48434989f7365cb1b117 | [log] [tgz] |
|---|---|---|
| author | Karol Gugala <kgugala@antmicro.com> | Wed Sep 13 13:14:14 2023 +0200 |
| committer | GitHub <noreply@github.com> | Wed Sep 13 13:14:14 2023 +0200 |
| tree | 7039023cfb01a47438f072f2c05f73921467fad4 | |
| parent | 835a40534f9efd70770d74f56f25fef6cfc6ebc6 [diff] | |
| parent | aefaa81f23c22eea7a7038c42c4cf1a0191f0395 [diff] |
Merge pull request #662 from antmicro/svplugin-instead-of-uhdm Replace deprecated Yosys UHDM plugin with SV plugin
This is the top-level repository for the F4PGA project, which is a Workgroup under the CHIPS Alliance; consisting of members from different backgrounds, including FPGA vendors, industrial users and academia (see Documentation > Community); who collaborate to build a more open source and software-driven FPGA ecosystem (IP, tools and workflows) to drive the adoption of FPGAs in existing and new use cases, and eliminate barriers of entry.