# Copyright (C) 2022 F4PGA Authors
#
# Licensed under the Apache License, Version 2.0 (the "License");
# you may not use this file except in compliance with the License.
# You may obtain a copy of the License at
#
#     http://www.apache.org/licenses/LICENSE-2.0
#
# Unless required by applicable law or agreed to in writing, software
# distributed under the License is distributed on an "AS IS" BASIS,
# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
# See the License for the specific language governing permissions and
# limitations under the License.
#
# SPDX-License-Identifier: Apache-2.0


xc7a50t: &xc7

  values:
    device: xc7a50t_test
    bitstream_device: artix7
    pinmap: '${shareDir}/arch/xc7a50t_test/vpr_grid_map.csv'
    arch_def: '${shareDir}/arch/xc7a50t_test/arch.timing.xml'
    rr_graph_lookahead_bin: '${shareDir}/arch/xc7a50t_test/rr_graph_xc7a50t_test.lookahead.bin'
    rr_graph_real_bin: '${shareDir}/arch/xc7a50t_test/rr_graph_xc7a50t_test.rr_graph.real.bin'
    vpr_place_delay: '${shareDir}/arch/xc7a50t_test/rr_graph_xc7a50t_test.place_delay.bin'
    vpr_grid_layout_name: xc7a50t-test
    vpr_options: &xc7-vpr_options
      max_router_iterations: 500
      routing_failure_predictor: 'off'
      router_high_fanout_threshold: -1
      constant_net_method: route
      route_chan_width: 500
      router_heap: bucket
      clock_modeling: route
      place_delta_delay_matrix_calculation_method: dijkstra
      place_delay_model: delta
      router_lookahead: extended_map
      check_route: quick
      strict_checks: 'off'
      allow_dangling_combinational_nodes: 'on'
      disable_errors: 'check_unbuffered_edges:check_route'
      congested_routing_iteration_threshold: '0.8'
      incremental_reroute_delay_ripup: 'off'
      base_cost_type: delay_normalized_length_bounded
      bb_factor: 10
      acc_fac: '0.7'
      astar_fac: '1.8'
      initial_pres_fac: '2.828'
      pres_fac_mult: '1.2'
      check_rr_graph: 'off'
      suppress_warnings: >-
        ${noisyWarnings},sum_pin_class:check_unbuffered_edges:load_rr_indexed_data_T_values:check_rr_node:trans_per_R:check_route:set_rr_graph_tool_comment:calculate_average_switch

  stages:
    mk_build_dir:
      module: 'mkdirs'
      params:
        build_dir: 'build/${device}'
    synth:
      module: 'yosys'
      params:
        takes:
          - xdc?
        produces:
          - sdc
          - synth_v
        prod_meta:
          sdc: Standard Design Constraints file for X7 series.
      values:
        tcl_scripts: '${shareDir}/scripts/xc7'
        yosys_tcl_env:
          USE_ROI: 'FALSE'
          TOP: '${top}'
          OUT_JSON: '${:json}'
          OUT_SDC: '${:sdc}'
          PART_JSON: '${prjxray_db}/${bitstream_device}/${part_name}/part.json'
          OUT_FASM_EXTRA: '${:fasm_extra}'
          TECHMAP_PATH: '${shareDir}/techmaps/xc7_vpr/techmap'
          OUT_SYNTH_V: '${:synth_v}'
          SYNTH_JSON: '${:synth_json}'
          OUT_EBLIF: '${:eblif}'
          PYTHON3: '${python3}'
          UTILS_PATH: '${shareDir}/scripts'
          INPUT_XDC_FILES: '${:xdc}'
    pack:
      module: 'pack'
    ioplace:
      module: 'generic_script_wrapper'
      params:
        stage_name: ioplace
        interpreter: '${python3}'
        script: ['-m', 'f4pga.utils.xc7.create_ioplace']
        outputs:
          io_place:
            mode: stdout
            target: '${:net[noext]}.ioplace'
        inputs:
          blif: '${:eblif}'
          map: '${shareDir}/arch/${device}/${part_name}/pinmap.csv'
          net: '${:net}'
          pcf: '${:pcf?}'
          $PYTHONPATH: '${binDir}/python/'
    place_constraints:
      module: 'generic_script_wrapper'
      params:
        stage_name: place_constraints
        interpreter: '${python3}'
        script: ['-m', 'f4pga.utils.xc7.create_place_constraints']
        outputs:
          place_constraints:
            mode: stdout
            target: '${:net[noext]}.preplace'
        inputs:
          net: '${:net}'
          arch: '${shareDir}/arch/${device}/arch.timing.xml'
          blif: '${:eblif}'
          input: '${:io_place}'
          db_root: '${prjxray_db}'
          part: '${part_name}'
          vpr_grid_map: '${shareDir}/arch/${device}/vpr_grid_map.csv'
          $PYTHONPATH: '${binDir}/python/'
    place:
      module: 'place'
    route:
      module: 'route'
    fasm:
      module: 'fasm'
    bitstream:
      module: 'generic_script_wrapper'
      params:
        stage_name: bitstream
        script: xcfasm
        outputs:
          bitstream:
            mode: file
            file: '${:fasm[noext]}.bit'
            target: '${:fasm[noext]}.bit'
        inputs:
          db-root: '${prjxray_db}/${bitstream_device}'
          part: '${part_name}'
          part_file: '${prjxray_db}/${bitstream_device}/${part_name}/part.yaml'
          sparse: true
          emit_pudc_b_pullup: true
          fn_in: '${:fasm}'
          frm2bit: xc7frames2bit
          bit_out: '${:fasm[noext]}.bit'


xc7a100t:

  <<: *xc7

  values:
    device: xc7a100t_test
    bitstream_device: artix7
    pinmap: '${shareDir}/arch/xc7a100t_test/vpr_grid_map.csv'
    arch_def: '${shareDir}/arch/xc7a100t_test/arch.timing.xml'
    rr_graph_lookahead_bin: '${shareDir}/arch/xc7a100t_test/rr_graph_xc7a100t_test.lookahead.bin'
    rr_graph_real_bin: '${shareDir}/arch/xc7a100t_test/rr_graph_xc7a100t_test.rr_graph.real.bin'
    vpr_place_delay: '${shareDir}/arch/xc7a100t_test/rr_graph_xc7a100t_test.place_delay.bin'
    vpr_grid_layout_name: xc7a100t-test
    vpr_options: *xc7-vpr_options


xc7a200t:

  <<: *xc7

  values:
    device: xc7a200t_test
    bitstream_device: artix7
    pinmap: '${shareDir}/arch/xc7a200t_test/vpr_grid_map.csv'
    arch_def: '${shareDir}/arch/xc7a200t_test/arch.timing.xml'
    rr_graph_lookahead_bin: '${shareDir}/arch/xc7a200t_test/rr_graph_xc7a200t_test.lookahead.bin'
    rr_graph_real_bin: '${shareDir}/arch/xc7a200t_test/rr_graph_xc7a200t_test.rr_graph.real.bin'
    vpr_place_delay: '${shareDir}/arch/xc7a200t_test/rr_graph_xc7a200t_test.place_delay.bin'
    vpr_grid_layout_name: xc7a200t-test
    vpr_options: *xc7-vpr_options


ice40:

  values:
    device: ICE40UP5K
    nextpnr_options:
      hx1k: true

  stages:
    mk_build_dir:
      module: 'mkdirs'
      params:
        build_dir: build/${device}
    synth:
      module: 'yosys'
      params:
        takes:
        produces:
        prod_meta:
      values:
        yosys_tcl_env:
          OUT_JSON: '${:json}'
    pnr:
      module: 'nextpnr_ice40'
      values:
        placer: heap
        router: router1
    bitstream:
      module: 'generic_script_wrapper'
      params:
        stage_name: bitstream
        script: icepack
        outputs:
          bitstream:
            mode: file
            file: "${:ice_asm[noext]}.bit"
            target: "${:ice_asm[noext]}.bit"
        inputs:
          "#1": "${:ice_asm}"
          "#2": "${:ice_asm[noext]}.bit"


ql-eos-s3:

  values:
    device: ql-eos-s3
    device_alt: ql-eos-s3_wlcsp
    pinmap: '${shareDir}/arch/ql-eos-s3_wlcsp/pinmap_${package}.csv'
    arch_def: '${shareDir}/arch/ql-eos-s3_wlcsp/arch.timing.xml'
    rr_graph_lookahead_bin: '${shareDir}/arch/ql-eos-s3_wlcsp/rr_graph_ql-eos-s3_wlcsp.lookahead.bin'
    rr_graph_real_bin: '${shareDir}/arch/ql-eos-s3_wlcsp/rr_graph_ql-eos-s3_wlcsp.rr_graph.real.bin'
    vpr_place_delay: '${shareDir}/arch/ql-eos-s3_wlcsp/rr_graph_ql-eos-s3_wlcsp.place_delay.bin'
    vpr_grid_layout_name: ql-eos-s3
    vpr_options:
      max_router_iterations: 500
      routing_failure_predictor: 'off'
      router_high_fanout_threshold: -1
      constant_net_method: route
      route_chan_width: 100
      clock_modeling: route
      place_delay_model: delta_override
      router_lookahead: extended_map
      check_route: quick
      strict_checks: 'off'
      allow_dangling_combinational_nodes: 'on'
      disable_errors: 'check_unbuffered_edges:check_route'
      congested_routing_iteration_threshold: '0.8'
      incremental_reroute_delay_ripup: 'off'
      base_cost_type: delay_normalized_length_bounded
      bb_factor: '10'
      initial_pres_fac: '4.0'
      check_rr_graph: 'off'
      pack_high_fanout_threshold: 'PB-lOGIC:18'
      suppress_warnings: >-
        ${noisyWarnings},sum_pin_class:check_unbuffered_edges:load_rr_indexed_data_T_values:check_rr_node:trans_per_R:check_route:set_rr_graph_tool_comment

  stages:
    mk_build_dir:
      module: 'mkdirs'
      params:
        build_dir: 'build/${device}'
    synth:
      module: 'yosys'
      params:
        takes:
          - pcf?
        produces:
          - synth_v
      values:
        tcl_scripts: '${shareDir}/scripts/pp3'
        read_verilog_args: []
        yosys_tcl_env:
          OUT_JSON: '${:json}'
          SYNTH_JSON: '${:synth_json}'
          OUT_SYNTH_V: '${:synth_v}'
          OUT_EBLIF: '${:eblif}'
          OUT_FASM_EXTRA: '${:fasm_extra}'
          TECHMAP_PATH: '${shareDir}/techmaps/pp3'
          DEVICE_CELLS_SIM: '${shareDir}/arch/ql-eos-s3_wlcsp/cells/ram_sim.v'
          DEVICE_CELLS_MAP: '${shareDir}/arch/ql-eos-s3_wlcsp/cells/ram_map.v'
          PINMAP_FILE: '${shareDir}/arch/ql-eos-s3_wlcsp/pinmap_${package}.csv'
          PCF_FILE: '${:pcf}'
          PYTHON3: '${python3}'
          UTILS_PATH: '${shareDir}/scripts'
    prepare_sdc:
      module: 'generic_script_wrapper'
      params:
        stage_name: prepare_sdc
        interpreter: '${python3}'
        script: ['-m', 'f4pga.utils.quicklogic.process_sdc_constraints']
        outputs:
          sdc:
            mode: file
            file: '${:eblif[noext]}.sdc'
            target: '${:eblif[noext]}.sdc'
        inputs:
          eblif: '${:eblif}'
          sdc-in: '${:sdc-in}'
          sdc-out: '${:eblif[noext]}.sdc'
          pcf: '${:pcf}'
          pin-map: ''
          $PYTHONPATH: '${shareDir}/scripts/'
    pack:
      module: 'pack'
      values:
        device: ql-eos-s3
        device_alt: ql-eos-s3_wlcsp
        pinmap: '${shareDir}/arch/ql-eos-s3_wlcsp/pinmap_${package}.csv'
        arch_def: '${shareDir}/arch/ql-eos-s3_wlcsp/arch.timing.xml'
        rr_graph_lookahead_bin: '${shareDir}/arch/ql-eos-s3_wlcsp/rr_graph_ql-eos-s3_wlcsp.lookahead.bin'
        rr_graph_real_bin: >-
          ${shareDir}/arch/ql-eos-s3_wlcsp/rr_graph_ql-eos-s3_wlcsp.rr_graph.real.bin
        vpr_place_delay: >-
          ${shareDir}/arch/ql-eos-s3_wlcsp/rr_graph_ql-eos-s3_wlcsp.place_delay.bin
        vpr_grid_layout_name: ql-eos-s3
        vpr_options:
          write_block_usage: block_usage.json
          max_router_iterations: 500
          routing_failure_predictor: 'off'
          router_high_fanout_threshold: -1
          constant_net_method: route
          route_chan_width: 100
          clock_modeling: route
          place_delay_model: delta_override
          router_lookahead: extended_map
          check_route: quick
          strict_checks: 'off'
          allow_dangling_combinational_nodes: 'on'
          disable_errors: 'check_unbuffered_edges:check_route'
          congested_routing_iteration_threshold: '0.8'
          incremental_reroute_delay_ripup: 'off'
          base_cost_type: delay_normalized_length_bounded
          bb_factor: '10'
          initial_pres_fac: '4.0'
          check_rr_graph: 'off'
          pack_high_fanout_threshold: 'PB-lOGIC:18'
          suppress_warnings: >-
            ${noisyWarnings},sum_pin_class:check_unbuffered_edges:load_rr_indexed_data_T_values:check_rr_node:trans_per_R:check_route:set_rr_graph_tool_comment
    ioplace:
      module: 'generic_script_wrapper'
      params:
        stage_name: ioplace
        interpreter: '${python3}'
        script: ['-m', 'f4pga.utils.quicklogic.pp3.create_ioplace']
        outputs:
          io_place:
            mode: stdout
            target: '${:eblif[noext]}.ioplace'
        inputs:
          blif: '${:eblif}'
          net: '${:net}'
          pcf: '${:pcf}'
          map: '${shareDir}/arch/ql-eos-s3_wlcsp/pinmap_${package}.csv'
          $PYTHONPATH: '${shareDir}/scripts/'
    place_constraints:
      module: 'generic_script_wrapper'
      params:
        stage_name: place_constraints
        interpreter: '${python3}'
        script: ['-m', 'f4pga.utils.quicklogic.pp3.create_place_constraints']
        outputs:
          place_constraints:
            mode: stdout
            target: '${:eblif[noext]}_constraints.place'
        inputs:
          blif: '${:eblif}'
          map: '${shareDir}/arch/ql-eos-s3_wlcsp/clkmap_${package}.csv'
          i: '${:io_place}'
          $PYTHONPATH: '${shareDir}/scripts/'
    place:
      module: 'place'
    iomux_jlink:
      module: 'generic_script_wrapper'
      params:
        stage_name: iomux_jlink
        interpreter: '${python3}'
        script: ['-m', 'f4pga.utils.quicklogic.pp3.eos-s3.iomux_config']
        outputs:
          iomux_jlink:
            mode: stdout
            target: '${:eblif[noext]}_iomux.jlink'
        inputs:
          eblif: '${:eblif}'
          pcf: '${:pcf}'
          map: '${shareDir}/arch/ql-eos-s3_wlcsp/pinmap_${package}.csv'
          output-format: jlink
          $PYTHONPATH: '${shareDir}/scripts/'
    iomux_openocd:
      module: 'generic_script_wrapper'
      params:
        stage_name: iomux_openocd
        interpreter: '${python3}'
        script: ['-m', 'f4pga.utils.quicklogic.pp3.eos-s3.iomux_config']
        outputs:
          iomux_openocd:
            mode: stdout
            target: '${:eblif[noext]}_iomux.openocd'
        inputs:
          eblif: '${:eblif}'
          pcf: '${:pcf}'
          map: '${shareDir}/arch/ql-eos-s3_wlcsp/pinmap_${package}.csv'
          output-format: openocd
          $PYTHONPATH: '${shareDir}/scripts/'
    iomux_binary:
      module: 'generic_script_wrapper'
      params:
        stage_name: iomux_binary
        interpreter: '${python3}'
        script: ['-m', 'f4pga.utils.quicklogic.pp3.eos-s3.iomux_config']
        outputs:
          iomux_binary:
            mode: stdout
            target: '${:eblif[noext]}_iomux.bin'
        inputs:
          eblif: '${:eblif}'
          pcf: '${:pcf}'
          map: '${shareDir}/arch/ql-eos-s3_wlcsp/pinmap_${package}.csv'
          output-format: binary
          $PYTHONPATH: '${shareDir}/scripts/'
    route:
      module: 'route'
      values:
        device: ql-eos-s3
        device_alt: ql-eos-s3_wlcsp
        pinmap: '${shareDir}/arch/ql-eos-s3_wlcsp/pinmap_${package}.csv'
        arch_def: '${shareDir}/arch/ql-eos-s3_wlcsp/arch.timing.xml'
        rr_graph_lookahead_bin: '${shareDir}/arch/ql-eos-s3_wlcsp/rr_graph_ql-eos-s3_wlcsp.lookahead.bin'
        rr_graph_real_bin: >-
          ${shareDir}/arch/ql-eos-s3_wlcsp/rr_graph_ql-eos-s3_wlcsp.rr_graph.real.bin
        vpr_place_delay: >-
          ${shareDir}/arch/ql-eos-s3_wlcsp/rr_graph_ql-eos-s3_wlcsp.place_delay.bin
        vpr_grid_layout_name: ql-eos-s3
        vpr_options:
          write_timing_summary: timing_summary.json
          max_router_iterations: 500
          routing_failure_predictor: 'off'
          router_high_fanout_threshold: -1
          constant_net_method: route
          route_chan_width: 100
          clock_modeling: route
          place_delay_model: delta_override
          router_lookahead: extended_map
          check_route: quick
          strict_checks: 'off'
          allow_dangling_combinational_nodes: 'on'
          disable_errors: 'check_unbuffered_edges:check_route'
          congested_routing_iteration_threshold: '0.8'
          incremental_reroute_delay_ripup: 'off'
          base_cost_type: delay_normalized_length_bounded
          bb_factor: '10'
          initial_pres_fac: '4.0'
          check_rr_graph: 'off'
          pack_high_fanout_threshold: 'PB-lOGIC:18'
          suppress_warnings: >-
            ${noisyWarnings},sum_pin_class:check_unbuffered_edges:load_rr_indexed_data_T_values:check_rr_node:trans_per_R:check_route:set_rr_graph_tool_comment
    analysis:
      module: 'analysis'
      values:
        device: ql-eos-s3
        device_alt: ql-eos-s3_wlcsp
        pinmap: '${shareDir}/arch/ql-eos-s3_wlcsp/pinmap_${package}.csv'
        arch_def: '${shareDir}/arch/ql-eos-s3_wlcsp/arch.timing.xml'
        rr_graph_lookahead_bin: '${shareDir}/arch/ql-eos-s3_wlcsp/rr_graph_ql-eos-s3_wlcsp.lookahead.bin'
        rr_graph_real_bin: >-
          ${shareDir}/arch/ql-eos-s3_wlcsp/rr_graph_ql-eos-s3_wlcsp.rr_graph.real.bin
        vpr_place_delay: >-
          ${shareDir}/arch/ql-eos-s3_wlcsp/rr_graph_ql-eos-s3_wlcsp.place_delay.bin
        vpr_grid_layout_name: ql-eos-s3
        vpr_options:
          gen_post_synthesis_netlist: 'on'
          gen_post_implementation_merged_netlist: 'on'
          post_synth_netlist_unconn_inputs: nets
          post_synth_netlist_unconn_outputs: nets
          verify_file_digests: 'off'
          max_router_iterations: 500
          routing_failure_predictor: 'off'
          router_high_fanout_threshold: -1
          constant_net_method: route
          route_chan_width: 100
          clock_modeling: route
          place_delay_model: delta_override
          router_lookahead: extended_map
          check_route: quick
          strict_checks: 'off'
          allow_dangling_combinational_nodes: 'on'
          disable_errors: 'check_unbuffered_edges:check_route'
          congested_routing_iteration_threshold: '0.8'
          incremental_reroute_delay_ripup: 'off'
          base_cost_type: delay_normalized_length_bounded
          bb_factor: '10'
          initial_pres_fac: '4.0'
          check_rr_graph: 'off'
          pack_high_fanout_threshold: 'PB-lOGIC:18'
          suppress_warnings: >-
            ${noisyWarnings},sum_pin_class:check_unbuffered_edges:load_rr_indexed_data_T_values:check_rr_node:trans_per_R:check_route:set_rr_graph_tool_comment
    fasm:
      module: 'fasm'
    bitstream:
      module: 'generic_script_wrapper'
      params:
        stage_name: bitstream
        script: qlfasm
        outputs:
          bitstream:
            mode: file
            file: '${:eblif[noext]}.bit'
            target: '${:eblif[noext]}.bit'
          bitstream_log:
            mode: stdout
            target: '${:eblif[noext]}.bit.log'
        inputs:
          '#1': '${:fasm}'
          '#2': '${:eblif[noext]}.bit'
          dev-type: ql-eos-s3
      values:
        build_dir: .
    bitstream_bitheader:
      module: 'generic_script_wrapper'
      params:
        stage_name: bitstream_bitheader
        script: symbiflow_write_bitheader
        outputs:
          bitstream_bitheader:
            mode: file
            file: '${:bitstream}.h'
            target: '${:bitstream}.h'
          bitstream_bitheader_log:
            mode: stdout
            target: '${:bitstream}.h.log'
        inputs:
          '#1': '${:bitstream}'
          '#2': '${:bitstream}.h'
          '#3': '${:iomux_binary}'
    bitstream_jlink:
      module: 'generic_script_wrapper'
      params:
        stage_name: bitstream_jlink
        script: symbiflow_write_jlink
        outputs:
          bitstream_jlink:
            mode: file
            file: '${:bitstream}.jlink'
            target: '${:bitstream}.jlink'
          bitstream_jlink_log:
            mode: stdout
            target: '${:bitstream}.jlink.log'
        inputs:
          '#1': '${:bitstream}'
          '#2': '${:bitstream}.jlink'
          '#3': '${:iomux_jlink}'
    bitstream_openocd:
      module: 'generic_script_wrapper'
      params:
        stage_name: bitstream_openocd
        script: symbiflow_write_openocd
        outputs:
          bitstream_openocd:
            mode: file
            file: '${:bitstream}.openocd'
            target: '${:bitstream}.openocd'
          bitstream_openocd_log:
            mode: stdout
            target: '${:bitstream}.openocd.log'
        inputs:
          '#1': '${:bitstream}'
          '#2': '${:bitstream}.openocd'
          '#3': '${:iomux_openocd}'
    bitstream_binary:
      module: 'generic_script_wrapper'
      params:
        stage_name: bitstream_binary
        script: symbiflow_write_binary
        outputs:
          bitstream_binary:
            mode: file
            file: '${:bitstream}.bin'
            target: '${:bitstream}.bin'
          bitstream_binary_log:
            mode: stdout
            target: '${:bitstream}.bin.log'
        inputs:
          '#1': '${:bitstream}'
          '#2': '${:bitstream}.bin'
          '#3': '${:iomux_binary}'
    fasm2bels:
      module: 'generic_script_wrapper'
      params:
        stage_name: fasm2bels
        script: symbiflow_fasm2bels
        outputs:
          fasm2bels_verilog:
            mode: file
            file: '${:bitstream}.v'
            target: '${:bitstream}.v'
          fasm2bels_pcf:
            mode: file
            file: '${:bitstream}.pcf'
            target: '${:bitstream}.pcf'
          fasm2bels_qcf:
            mode: file
            file: '${:bitstream}.qcf'
            target: '${:bitstream}.qcf'
          fasm2bels_log:
            mode: stdout
            target: '${:bitstream}.log'
        inputs:
          device: '${device}'
          part: '${package}'
          pcf: '${:pcf}'
          bit: '${:bitstream}'
          out-verilog: '${:bitstream}.v'
          out-pcf: '${:bitstream}.pcf'
          out-qcf: '${:bitstream}.qcf'
          $F4PGA_INSTALL_DIR: '${shareDir}/../../../'
          $FPGA_FAM: eos-s3
          $PATH: '${shareDir}/../../conda/envs/eos-s3/bin/:/usr/local/sbin:/usr/local/bin:/usr/sbin:/usr/bin:/sbin:/bin'
          $BIN_DIR_PATH: '${binDir}'


ql-k4n8_fast: &ql-k4n8

  values:
    device: qlf_k4n8_umc22
    rr_graph_lookahead_bin: >-
      ${shareDir}/arch/qlf_k4n8-qlf_k4n8_umc22_fast_qlf_k4n8-qlf_k4n8_umc22_fast/rr_graph_qlf_k4n8-qlf_k4n8_umc22_fast_qlf_k4n8-qlf_k4n8_umc22_fast.lookahead.bin
    rr_graph_real_bin: >-
      ${shareDir}/arch/qlf_k4n8-qlf_k4n8_umc22_fast_qlf_k4n8-qlf_k4n8_umc22_fast/qlf_k4n8-qlf_k4n8_umc22_fast.rr_graph.bin
    vpr_place_delay: >-
      ${shareDir}/arch/qlf_k4n8-qlf_k4n8_umc22_fast_qlf_k4n8-qlf_k4n8_umc22_fast/rr_graph_qlf_k4n8-qlf_k4n8_umc22_fast_qlf_k4n8-qlf_k4n8_umc22_fast.place_delay.bin
    vpr_grid_layout_name: qlf_k4n8-qlf_k4n8_umc22_fast
    arch_def: >-
      ${shareDir}/arch/qlf_k4n8-qlf_k4n8_umc22_fast_qlf_k4n8-qlf_k4n8_umc22_fast/arch_qlf_k4n8-qlf_k4n8_umc22_fast_qlf_k4n8-qlf_k4n8_umc22_fast.xml
    vpr_options: &ql-k4n8-vpr_options
      max_router_iterations: 500
      routing_failure_predictor: 'off'
      router_high_fanout_threshold: -1
      constant_net_method: route
      route_chan_width: 100
      clock_modeling: ideal
      place_delta_delay_matrix_calculation_method: dijkstra
      place_delay_model: delta_override
      router_lookahead: extended_map
      allow_dangling_combinational_nodes: 'on'
      absorb_buffer_luts: 'off'

  stages: &ql-k4n8-stages
    mk_build_dir:
      module: 'mkdirs'
      params:
        build_dir: 'build/${device}'
    synth:
      module: 'yosys'
      params:
        produces:
          - synth_v
      values:
        tcl_scripts: '${shareDir}/scripts/qlf_k4n8'
        read_verilog_args: []
        yosys_tcl_env:
          TOP: '${top}'
          OUT_JSON: '${:json}'
          SYNTH_JSON: '${:synth_json}'
          TECHMAP_PATH: '${shareDir}/techmaps/qlf_k4n8'
          OUT_SYNTH_V: '${:synth_v}'
          OUT_EBLIF: '${:eblif}'
          PYTHON3: '${python3}'
    pack:
      module: 'pack'
    ioplace:
      module: 'generic_script_wrapper'
      params:
        stage_name: ioplace
        interpreter: '${python3}'
        script: ['-m', 'f4pga.utils.quicklogic.qlf_k4n8.create_ioplace']
        outputs:
          io_place:
            mode: stdout
            target: '${:eblif[noext]}.ioplace'
        inputs:
          blif: '${:eblif}'
          net: '${:net}'
          pcf: '${:pcf}'
          pinmap_xml: >-
            ${shareDir}/arch/qlf_k4n8-qlf_k4n8_umc22_fast_qlf_k4n8-qlf_k4n8_umc22_fast/pinmap_qlf_k4n8_umc22.xml
          csv_file: >-
            ${shareDir}/arch/qlf_k4n8-qlf_k4n8_umc22_fast_qlf_k4n8-qlf_k4n8_umc22_fast/pinmap_qlf_k4n8_umc22_24x24.csv
          $PYTHONPATH: '${binDir}/python/'
    repack: &ql-k4n8-stages-repack
      module: 'generic_script_wrapper'
      params:
        stage_name: repack
        interpreter: '${python3}'
        script: ['-m', 'f4pga.utils.quicklogic.repacker.repack']
        outputs:
          eblif_repacked:
            mode: file
            file: '${:eblif[noext]}_repacked.eblif'
            target: '${:eblif[noext]}_repacked.eblif'
          place_repacked:
            mode: file
            file: '${:place[noext]}_repacked.place'
            target: '${:place[noext]}_repacked.place'
          net_repacked:
            mode: file
            file: '${:net[noext]}_repacked.net'
            target: '${:net[noext]}_repacked.net'
          repack_log:
            mode: stdout
            target: '${top}.repack.log'
        inputs:
          eblif-in: '${:eblif}'
          net-in: '${:net}'
          place-in: '${:place}'
          eblif-out: '${:eblif[noext]}_repacked.eblif'
          place-out: '${:place[noext]}_repacked.place'
          net-out: '${:net[noext]}_repacked.net'
          absorb_buffer_luts: 'on'
          vpr-arch: '${arch_def}'
          repacking-rules: '${repacking_rules}'
          json-constraints: '${json_constraints?}'
          pcf-constraints: '${pcf?}'
          $PYTHONPATH: '${binDir}/python/'
      values:
        repacking_rules: >-
          ${shareDir}/arch/qlf_k4n8-qlf_k4n8_umc22_fast_qlf_k4n8-qlf_k4n8_umc22_fast/qlf_k4n8-qlf_k4n8_umc22_fast.repacking_rules.json
    place:
      module: 'place'
    route:
      module: 'io_rename'
      params:
        module: 'route'
        rename_takes:
          eblif: eblif_repacked
          place: place_repacked
          net: net_repacked
    fasm:
      module: 'io_rename'
      params:
        module: 'fasm'
        rename_takes:
          eblif: eblif_repacked
          place: place_repacked
          net: net_repacked
    bitstream:
      module: 'generic_script_wrapper'
      params:
        stage_name: bitstream
        script: qlf_fasm
        outputs:
          bitstream:
            mode: file
            file: '${:fasm[noext]}.bit'
            target: '${:fasm[noext]}.bit'
        inputs:
          '#1': '${:fasm}'
          '#2': '${:fasm[noext]}.bit'
          db-root: '${shareDir}/fasm_database/qlf_k4n8'
          format: 4byte
          assemble: true


ql-k4n8_slow:

  <<: *ql-k4n8

  values:
    device: qlf_k4n8_umc22
    rr_graph_lookahead_bin: >-
      ${shareDir}/arch/qlf_k4n8-qlf_k4n8_umc22_slow_qlf_k4n8-qlf_k4n8_umc22_slow/rr_graph_qlf_k4n8-qlf_k4n8_umc22_slow_qlf_k4n8-qlf_k4n8_umc22_slow.lookahead.bin
    rr_graph_real_bin: >-
      ${shareDir}/arch/qlf_k4n8-qlf_k4n8_umc22_slow_qlf_k4n8-qlf_k4n8_umc22_slow/qlf_k4n8-qlf_k4n8_umc22_slow.rr_graph.bin
    vpr_place_delay: >-
      ${shareDir}/arch/qlf_k4n8-qlf_k4n8_umc22_slow_qlf_k4n8-qlf_k4n8_umc22_slow/rr_graph_qlf_k4n8-qlf_k4n8_umc22_slow_qlf_k4n8-qlf_k4n8_umc22_slow.place_delay.bin
    vpr_grid_layout_name: qlf_k4n8-qlf_k4n8_umc22_slow
    arch_def: >-
      ${shareDir}/arch/qlf_k4n8-qlf_k4n8_umc22_slow_qlf_k4n8-qlf_k4n8_umc22_slow/arch_qlf_k4n8-qlf_k4n8_umc22_slow_qlf_k4n8-qlf_k4n8_umc22_slow.xml
    vpr_options: *ql-k4n8-vpr_options

  stages:
    <<: *ql-k4n8-stages
    ioplace:
      module: 'generic_script_wrapper'
      params:
        stage_name: ioplace
        interpreter: '${python3}'
        script: ['-m', 'f4pga.utils.quicklogic.qlf_k4n8.create_ioplace']
        outputs:
          io_place:
            mode: stdout
            target: '${:eblif[noext]}.ioplace'
        inputs:
          blif: '${:eblif}'
          net: '${:net}'
          pcf: '${:pcf}'
          pinmap_xml: >-
            ${shareDir}/arch/qlf_k4n8-qlf_k4n8_umc22_slow_qlf_k4n8-qlf_k4n8_umc22_slow/pinmap_qlf_k4n8_umc22.xml
          csv_file: >-
            ${shareDir}/arch/qlf_k4n8-qlf_k4n8_umc22_slow_qlf_k4n8-qlf_k4n8_umc22_slow/pinmap_qlf_k4n8_umc22_24x24.csv
          $PYTHONPATH: '${binDir}/python/'
    repack:
      <<: *ql-k4n8-stages-repack
      values:
        repacking_rules: >-
          ${shareDir}/arch/qlf_k4n8-qlf_k4n8_umc22_slow_qlf_k4n8-qlf_k4n8_umc22_slow/qlf_k4n8-qlf_k4n8_umc22_slow.repacking_rules.json