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foss-fpga-tools/third_party/Surelog/36b4216d1db413803a993ffb92cda5b2bcc4912b/./SVIncCompil/Testcases/YosysTests/backends/write_verilog_shift_shiftx
tree: fe4a5beb5d0b8e618092eaaf123831ea15185a74
  1. testbench.v
  2. top.v