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foss-fpga-tools / third_party / Surelog / 7f33cfad4f75d76cd8c8bdf0b313ea5b00658606
commit7f33cfad4f75d76cd8c8bdf0b313ea5b00658606[log] [tgz]
authorAlain Dargelas <5085492+alainmarcel@users.noreply.github.com>Sat Nov 16 12:55:49 2019 -0800
committerGitHub <noreply@github.com>Sat Nov 16 12:55:49 2019 -0800
tree8ea04aef778fd28a10bfdb3a8623d10617269a24
parent1c00f24f82d2ff39140be75d788d9d247f12c59d [diff]
parent55b3d8f0b21a6fa55a24349f3f773cc3d41fa3fd [diff]
Merge pull request #62 from alainmarcel/alainmarcel-patch-1

fixed a test executing in wrong directory
tree: 8ea04aef778fd28a10bfdb3a8623d10617269a24
  1. grammar/
  2. src/
  3. tests/
  4. third_party/
  5. .gitignore
  6. .travis.yml
  7. _config.yml
  8. CMakeLists.txt
  9. INSTALL.md
  10. LICENSE
  11. Makefile
  12. NOTICE
  13. README.md
README.md

Surelog

System Verilog 2017 Pre-processor, Parser

Goal

This project aims at providing a complete System Verilog 2017 front-end: a preprocessor, a parser, an elaborator for both design and testbench.

Applications

Linter, Simulator, Synthesys tool, Formal tools can use this front-end and be developed either as plugins (linked with) or use this front-end as an intermediate step of their compilation flows using the on-disk memory models (down-converter).

Contributing to this project

This project is open to contributions from any user! From the commercial vendor to the Verilog enthousiast are welcome.

Features

  • The preprocessor and the parser use Antlr 4.72 as a parser generator.
  • The preprocessor and the parser ASTs are made persistent on disk using Google Flatbuffers, enabling incremental compilation.
  • The tool is built thread safe and performs multithread parsing.
  • Large files/modules/packages are splitted for multi-threading compilation.
  • Surelog accepts IEEE Simulator-compliant project specification.
  • Surelog issues Errors/Warning/Info/Notes about language compliance.
  • Surelog allows for pre-compiled packages (UVM,...).

Build instructions and test:

make

For more build/test options and system requirements for building see src/README file.

Surelog commands

  • The executable is located here:

    • dist/Release/GNU-Linux/surelog

  • STANDARD VERILOG COMMAND LINE:

    • -f Accepts a file containing command line arguments
    • -v Library file
    • -y Library directory
    • +incdir++... Specifies include paths
    • -Idir Specifies include paths
    • +libext++... Specifies the library extensions
    • .v Verilog File
    • .sv System Verilog File
    • +liborder Lib Order option (ignored)
    • +librescan Lib Rescan option (ignored)
    • +libverbose Lib Verbose option (ignored)
    • +nolibcell No Lib Cell option (ignored)
    • +define+macro_name=definition+...
    •                  Defines a macro and optionally its value
    • -L Defines library compilation order
    • -map Specifies a library mapping file (multiple -map options supported)
    • -cfgfile Specifies a configuration file (multiple -cfgFile options supported)
    • -cfg Specifies a configuration to use (multiple -cfg options supported)
    • -Dvar=value Same as env var definition for -f files var substitution

  • FLOWS OPTIONS:

    • -fileunit Compiles each Verilog file as an independent
    •                   compilation unit (under slpp_unit/ if -writepp used)
    • -diffcompunit Compiles both all files as a whole unit and
    •                   separate compilation units to perform diffs
    • -parse Parse/Compile/Elaborate the files after pre-processing step
    • -nocomp Turns off Compilation & Elaboration
    • -noelab Turns off Elaboration
    • -pythonlistener Enables the Parser Python Listener
    • -pythonlistenerfile <script.py> Specifies the AST python listener file
    • -pythonevalscriptperfile <script.py> Eval the Python script on each source file (Multithreaded)
    • -pythonevalscript <script.py> Eval the Python script at the design level
    • -nopython Turns off all Python features, including waivers
    • -strictpythoncheck Turns on strict Python checks
    • -mt <nb_max_treads> 0 up to 512 max threads, 0 or 1 being single threaded,
    •                   if "max" is given, the program will use one thread

    •                   per core on the host
    • -split Split files or modules larger than specified line number for multi thread compilation
    • -timescale= Specifies the overall timescale
    • -nobuiltin Do not parse SV builtin classes (array...)

  • TRACES OPTIONS:

    • -d Debug 1-4, lib, ast, inst, incl
    • -nostdout Mutes Standard output
    • -verbose Gives verbose processing information
    • -profile Gives Profiling information
    • -l Specifies log file, default is surelog.log under output dir

  • OUTPUT OPTIONS:

    • -odir Specifies the output directory, default is ./
    • -writeppfile Writes out Preprocessor output in file
    •                  (all compilation units will override this file)
    • -writepp Writes out Preprocessor output (all compilation
    •                   units will generate files under slpp_all/ or slpp_unit/)
    • -lineoffsetascomments Writes the preprocessor line offsets as comments as opposed as parser directives
    • -nocache Default allows to create a cache for include files, this option prevents it
    • -cache Specifies the cache directory, default is slpp_all/cache or slpp_unit/cache
    • -createcache Create cache for precompiled packages
    • -filterdirectives Filters out simple directives like
    •                  `default_nettype in pre-processor's output
    • -filterprotected Filters out protected regions in pre-processor's output
    • -filtercomments Filters out comments in pre-processor's output
    • -outputlineinfo Outputs SLline directives in pre-processor's output
    • -pploc Output message location in terms of post preprocessor location
    • -noinfo Filters out INFO messages
    • -nonote Filters out NOTE messages
    • -nowarning Filters out WARNING messages
    • -o Turns on all compilation stages, produces all outputs under that path