diff --git a/SVIncCompil/Testcases/regression.log b/SVIncCompil/Testcases/regression.log
index 2388ad8..585ef0c 100644
--- a/SVIncCompil/Testcases/regression.log
+++ b/SVIncCompil/Testcases/regression.log
@@ -2,125 +2,6 @@
 ************************
 START SURELOG REGRESSION
 
-Starts on 11/13/2019 08:42:14
+Starts on 11/13/2019 13:41:07
 COMMAND: /usr/bin/time  /home/alain/Surelog/SVIncCompil/Testcases/../dist/surelog/surelog
 Creating release for regression...
-Skipping ovm_pkg...
-Skipping uvm_pkg...
-Created  dist/surelog_release_tcmalloc.tar.gz
-PASS: surelog_release_tcmalloc
-THERE ARE 103 tests
-RUNNING   93 tests
-
-+----------------------------+----------+----------+----------+----------+----------+----------+--------------+--------------+
-| TESTNAME                   | STATUS   | FATALS   | ERRORS   | WARNINGS | NOTES    | SYNTAX   | ELAPSED TIME | MEM(Mb)      |
-+----------------------------+----------+----------+----------+----------+----------+----------+--------------+--------------+
-| Monitor                    | PASS     | 0        | 0        | 11       | 7        | 0        | 13s          | 262          |
-| UnitDefParam               | PASS     | 0        | 0        | 17       | 8        | 0        | 0s           | 44           |
-| YosysSmall                 | PASS     | 0        | 1        | 6        | 9        | 0        | 1s           | 46           |
-| UnitForLoop                | PASS     | 0        | 4        | 0        | 4        | 0        | 0s           | 44           |
-| SimpleUVM                  | PASS     | 0        | 0        | 11       | 7        | 0        | 2s           | 115          |
-| SimpleVMM                  | PASS     | 0        | 0        | 16       | 5        | 0        | 22s          | 286          |
-| YosysBigSimAes             | PASS     | 0        | 0        | 0        | 5        | 0        | 1s           | 53           |
-| UnitPackage                | PASS     | 0        | 0        | 6        | 9        | 0        | 1s           | 57           |
-| OldLibrary                 | PASS     | 0        | 0        | 4        | 8        | 0        | 0s           | 44           |
-| SimpleCmdLineTest          | PASS     | 0        | 0        | 1        | 1        | 0        | 0s           | 44           |
-| YosysBigSimSoft            | PASS     | 0        | 0        | 2        | 6        | 0        | 2s           | 89           |
-| RiscV                      | PASS     | 0        | 0        | 10       | 19       | 0        | 3s           | 101          |
-| TimeUnit                   | PASS     | 0        | 8        | 10       | 7        | 0        | 0s           | 49           |
-| SimpleClass                | PASS     | 0        | 1        | 2        | 6        | 0        | 0s           | 44           |
-| UnitAmiqEth                | PASS     | 0        | 0        | 7        | 4        | 0        | 6s           | 141          |
-| PackageHierRef             | PASS     | 0        | 2        | 8        | 9        | 0        | 0s           | 44           |
-| AmiqEth                    | PASS     | 0        | 10       | 32       | 5        | 0        | 16s          | 399          |
-| SimpleInterface            | PASS     | 0        | 3        | 13       | 20       | 0        | 2s           | 114          |
-| YosysOldI2c                | PASS     | 0        | 0        | 16       | 26       | 0        | 0s           | 34           |
-| UnitLibrary                | PASS     | 0        | 2        | 16       | 31       | 0        | 0s           | 44           |
-| Google                     | PASS     | 0        | 169      | 83       | 114      | 39       | 14s          | 657          |
-| YosysDsp                   | PASS     | 0        | 5        | 20       | 20       | 0        | 4s           | 107          |
-| SimpleConstraint           | PASS     | 0        | 0        | 2        | 4        | 0        | 1s           | 51           |
-| Icarus                     | PASS     | 0        | 10       | 264      | 160      | 4        | 17s          | 646          |
-| UnitForeach                | PASS     | 0        | 7        | 0        | 4        | 0        | 0s           | 45           |
-| Escape                     | PASS     | 0        | 5        | 10       | 8        | 0        | 0s           | 47           |
-| Scoreboard                 | PASS     | 0        | 0        | 11       | 7        | 0        | 3s           | 118          |
-| BuildOVMPkg                | PASS     | 0        | 0        | 16       | 5        | 0        | 45s          | 812          |
-| YosysOldSimpleSpi          | PASS     | 0        | 2        | 8        | 9        | 0        | 1s           | 62           |
-| YosysOldSsPcm              | PASS     | 0        | 1        | 2        | 6        | 0        | 1s           | 45           |
-| AVLMM                      | PASS     | 0        | 4        | 4        | 5        | 0        | 3s           | 91           |
-| UnitEnum                   | PASS     | 0        | 1        | 2        | 5        | 0        | 0s           | 44           |
-| TestMacros                 | PASS     | 0        | 3        | 0        | 11       | 2        | 0s           | 47           |
-| UnitQueue                  | PASS     | 0        | 4        | 0        | 4        | 0        | 0s           | 44           |
-| ApbSlave                   | PASS     | 0        | 0        | 1        | 7        | 0        | 2s           | 68           |
-| SimpleParserTest           | PASS     | 0        | 0        | 0        | 0        | 0        | 2s           | 75           |
-| YosysOldOr                 | PASS     | 0        | 0        | 0        | 117      | 0        | 10s          | 470          |
-| YosysCam                   | PASS     | 0        | 0        | 0        | 7        | 0        | 1s           | 59           |
-| ClassCons                  | PASS     | 0        | 1        | 2        | 6        | 0        | 0s           | 47           |
-| TestBasic                  | PASS     | 0        | 0        | 0        | 0        | 0        | 0s           | 44           |
-| AmiqSimpleTestSuite        | PASS     | 0        | 12       | 15       | 9        | 0        | 31s          | 519          |
-| SimpleOVM                  | PASS     | 0        | 0        | 16       | 4        | 0        | 0s           | 78           |
-| TestFileSplit              | PASS     | 0        | 3        | 7        | 8        | 0        | 0s           | 44           |
-| YosysVerx                  | PASS     | 0        | 0        | 3        | 8        | 0        | 7s           | 230          |
-| YosysBigSimOpenMsp         | PASS     | 0        | 7        | 33       | 33       | 1        | 7s           | 211          |
-| MiniAmiq                   | PASS     | 0        | 0        | 11       | 6        | 0        | 11s          | 244          |
-| SeqDriver                  | PASS     | 0        | 0        | 11       | 7        | 0        | 3s           | 121          |
-| UnitClass                  | PASS     | 0        | 8        | 1        | 6        | 0        | 0s           | 44           |
-| ClassFuncProto             | PASS     | 0        | 5        | 1        | 6        | 0        | 0s           | 44           |
-| SimpleIncludeAndMacros     | PASS     | 0        | 32       | 10       | 26       | 6        | 1s           | 49           |
-| UnitSimpleIncludeAndMacros | PASS     | 0        | 30       | 18       | 12       | 6        | 1s           | 48           |
-| YosysBigSimAmber23         | PASS     | 0        | 3        | 17       | 22       | 1        | 6s           | 187          |
-| YosysOldAes                | PASS     | 0        | 6        | 10       | 10       | 0        | 2s           | 154          |
-| YosysOldUsb                | PASS     | 0        | 3        | 6        | 7        | 0        | 1s           | 63           |
-| YosysOldOpen               | PASS     | 0        | 0        | 20       | 31       | 0        | 6s           | 162          |
-| PragmaProtect              | PASS     | 0        | 1        | 1        | 6        | 0        | 0s           | 46           |
-| UVMNestedSeq               | PASS     | 0        | 3        | 12       | 7        | 0        | 5s           | 169          |
-| Custom_FIR_DMA             | PASS     | 0        | 7        | 54       | 102      | 0        | 8s           | 409          |
-| YosysSmallBoom             | PASS     | 0        | 0        | 291      | 296      | 0        | 34s          | 2625         |
-| InterfaceModPort           | PASS     | 0        | 0        | 2        | 15       | 0        | 5s           | 49           |
-| GoogleMT                   | PASS     | 0        | 169      | 83       | 114      | 39       | 14s          | 657          |
-| UnitElabBlock              | PASS     | 0        | 0        | 3        | 14       | 0        | 0s           | 44           |
-| DiffSimpleIncludeAndMacros | PASS     | 0        | 62       | 30       | 38       | 0        | 1s           | 48           |
-| Yosys                      | PASS     | 0        | 10       | 457      | 0        | 10       | 12s          | 340          |
-| Verilator                  | PASS     | 0        | 631      | 416      | 4        | 48       | 132s         | 1833         |
-| UnitTest                   | PASS     | 0        | 0        | 0        | 4        | 0        | 0s           | 44           |
-| Ibex                       | PASS     | 0        | 0        | 10       | 10       | 0        | 25s          | 475          |
-| YosysBigSimLm32            | PASS     | 0        | 12       | 20       | 24       | 0        | 8s           | 259          |
-| YosysBigSimReed            | PASS     | 0        | 1        | 0        | 0        | 0        | 0s           | 16           |
-| YosysOldSpi                | PASS     | 0        | 109      | 6        | 7        | 3        | 2s           | 112          |
-| SVSwitch                   | PASS     | 0        | 0        | 2        | 52       | 0        | 4s           | 85           |
-| Zachjs                     | PASS     | 0        | 271      | 74       | 0        | 9        | 7s           | 192          |
-| CoresSweRV                 | PASS     | 0        | 0        | 110      | 21       | 0        | 32s          | 740          |
-| YosysOldSystem             | PASS     | 0        | 0        | 14       | 11       | 0        | 3s           | 230          |
-| OVMSwitch                  | PASS     | 0        | 1        | 17       | 124      | 0        | 12s          | 260          |
-| Driver                     | PASS     | 0        | 0        | 11       | 8        | 0        | 4s           | 129          |
-| UtdSV                      | PASS     | 0        | 9        | 2797     | 488      | 3        | 21s          | 1028         |
-| YosysMarlann               | PASS     | 0        | 0        | 2        | 7        | 0        | 2s           | 63           |
-| UVMSwitch                  | PASS     | 0        | 0        | 11       | 129      | 0        | 14s          | 285          |
-| GenerateUnnamed            | PASS     | 0        | 0        | 2        | 24       | 0        | 0s           | 45           |
-| SplitFile                  | PASS     | 0        | 13       | 17       | 27       | 0        | 0s           | 49           |
-| UnitElab                   | PASS     | 0        | 1        | 17       | 2465     | 0        | 1s           | 54           |
-| UnitElabExternNested       | PASS     | 0        | 0        | 8        | 22       | 0        | 0s           | 44           |
-| BeginKeywords              | PASS     | 0        | 0        | 1        | 6        | 0        | 0s           | 44           |
-| SimpleTask                 | PASS     | 0        | 0        | 2        | 20       | 0        | 1s           | 51           |
-| IbexGoogle                 | PASS     | 0        | 7        | 11       | 7        | 1        | 34s          | 482          |
-| BlackParrot                | PASS     | 0        | 15       | 219      | 108      | 0        | 54s          | 1140         |
-| YosysBigSimPong            | PASS     | 0        | 0        | 6        | 8        | 0        | 2s           | 115          |
-| YosysOldSasc               | PASS     | 0        | 3        | 5        | 9        | 0        | 1s           | 53           |
-| SimpleClass1               | PASS     | 0        | 8        | 15       | 8        | 0        | 1s           | 115          |
-| UnitPython                 | PASS     | 0        | 0        | 3        | 0        | 0        | 0s           | 44           |
-| SimpleClass2               | PASS     | 0        | 2        | 3        | 4        | 0        | 0s           | 44           |
-| LibraryIntercon            | PASS     | 0        | 0        | 3        | 29       | 0        | 1s           | 49           |
-+----------------------------+----------+----------+----------+----------+----------+----------+--------------+--------------+
-
- RESULT : PASS
-
-+--------------+----------+----------+
-|              | CURRENT  | PREVIOUS |
-+--------------+----------+----------+
-|TOTAL ELAPSED | 689s     | 689s     |
-|TOTAL USER    | 660s     | 660s     |
-|MAX MEM TEST  | 2625Mb   | 2625Mb   |
-|MAX TIME TEST | 132s     | 132s     |
-+--------------+----------+----------+
-
-End on 11/13/2019 08:42:19
-END SURELOG REGRESSION
-************************
diff --git a/SVIncCompil/Testcases/regression.tcl b/SVIncCompil/Testcases/regression.tcl
index 139698c..aee93af 100755
--- a/SVIncCompil/Testcases/regression.tcl
+++ b/SVIncCompil/Testcases/regression.tcl
@@ -149,6 +149,8 @@
 if [regexp {commit=([A-Za-z0-9_ \.]+)} $argv tmp COMMIT_TEXT] {
 }
 
+set env(LD_LIBRARY_PATH) "[pwd]/../../python3.6/python/lib/"
+
 set SURELOG_VERSION "[pwd]/../dist/surelog/surelog"
 set REGRESSION_PATH [pwd]