fix uninit memory
Signed-off-by: Alain <alainmarcel@yahoo.com>
diff --git a/src/CommandLine/CommandLineParser.cpp b/src/CommandLine/CommandLineParser.cpp
index fc36f04..f24312a 100644
--- a/src/CommandLine/CommandLineParser.cpp
+++ b/src/CommandLine/CommandLineParser.cpp
@@ -227,6 +227,7 @@
m_filterProtectedRegions(false),
m_filterComments(false),
m_parse(false),
+ m_parseOnly(false),
m_compile(false),
m_elaborate(false),
m_diff_comp_mode(diff_comp_mode),
diff --git a/tests/regression.tcl b/tests/regression.tcl
index 26cecd6..5a445e6 100755
--- a/tests/regression.tcl
+++ b/tests/regression.tcl
@@ -146,6 +146,7 @@
set BUILD "Release"
if [regexp {build=([A-Za-z0-9_]+)} $argv tmp BUILD] {
+ puts "BUILD=$BUILD"
}
set SHOW_DETAILS 0
@@ -161,7 +162,7 @@
if [regexp {commit=([A-Za-z0-9_ \.]+)} $argv tmp COMMIT_TEXT] {
}
-set SURELOG_VERSION "[pwd]/dist/Release/surelog"
+set SURELOG_VERSION "[pwd]/dist/$BUILD/surelog"
set REGRESSION_PATH [pwd]
set SURELOG_COMMAND "$TIME $DEBUG_TOOL $SURELOG_VERSION"
diff --git a/third_party/tests/YosysOldTests/sasc/YosysOldSasc.log b/third_party/tests/YosysOldTests/sasc/YosysOldSasc.log
index ed50d8c..bc8c5ae 100644
--- a/third_party/tests/YosysOldTests/sasc/YosysOldSasc.log
+++ b/third_party/tests/YosysOldTests/sasc/YosysOldSasc.log
@@ -2,19 +2,15 @@
[INFO :CM0020] Separate compilation-unit mode is on.
-[ERROR:PP0101] rtl/sasc_brg.v:66 Cannot open include file "timescale.v".
-
-[ERROR:PP0101] rtl/sasc_top.v:62 Cannot open include file "timescale.v".
-
[WARNI:PA0205] cache/synth.v:1 No timescale set for "sasc_fifo4".
[WARNI:PA0205] cache/synth.v:282 No timescale set for "sasc_top".
-[WARNI:PA0205] timescale.v:22 No timescale set for "sasc_brg".
+[WARNI:PA0205] rtl/sasc_brg.v:87 No timescale set for "sasc_brg".
[INFO :CP0300] Compilation...
-[INFO :CP0303] timescale.v:22 Compile module "work@sasc_brg".
+[INFO :CP0303] rtl/sasc_brg.v:87 Compile module "work@sasc_brg".
[INFO :CP0303] cache/synth.v:1 Compile module "work@sasc_fifo4".
@@ -30,12 +26,12 @@
[NOTE :EL0503] cache/synth.v:282 Top level module "work@sasc_top".
-[NOTE :EL0503] timescale.v:22 Top level module "work@sasc_brg".
+[NOTE :EL0503] rtl/sasc_brg.v:87 Top level module "work@sasc_brg".
[WARNI:EL0505] rtl/sasc_fifo4.v:62 Multiply defined module "work@sasc_fifo4",
cache/synth.v:1 previous definition.
-[WARNI:EL0505] timescale.v:11 Multiply defined module "work@sasc_top",
+[WARNI:EL0505] rtl/sasc_top.v:72 Multiply defined module "work@sasc_top",
cache/synth.v:282 previous definition.
[NOTE :EL0504] Multiple top level modules in design.
@@ -50,7 +46,7 @@
[ FATAL] : 0
[ SYNTAX] : 0
-[ ERROR] : 2
+[ ERROR] : 0
[WARNING] : 5
[ NOTE] : 9
diff --git a/third_party/tests/YosysOldTests/sasc/YosysOldSasc.sl b/third_party/tests/YosysOldTests/sasc/YosysOldSasc.sl
index 23bd568..cce567a 100644
--- a/third_party/tests/YosysOldTests/sasc/YosysOldSasc.sl
+++ b/third_party/tests/YosysOldTests/sasc/YosysOldSasc.sl
@@ -1 +1 @@
- -writepp -parse -mt max -nopython -fileunit */*.v +incdir+. -nobuiltin -nocache
+ -writepp -parse -mt max -nopython -fileunit */*.v +incdir+.+rtl -nobuiltin -nocache
