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*  SURELOG System Verilog Compiler/Linter  *
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[INFO :CM0023] Creating log file ../../build/tests/UnitTest/slpp_unit/surelog.log.

[INFO :CM0020] Separate compilation-unit mode is on.

PP PREPROCESS FILE: top.v
PP RECORDING MACRO: declare_bp_mem_wormhole_payload_s: | \
    typedef struct packed                                               \
    {                                                                   \
      logic [data_width_mp-1:0]     data;                               \
      logic [cid_width_mp-1:0]      src_cid;                            \
      logic [cord_width_mp-1:0]     src_cord;                           \
      logic [reserved_width_mp-1:0] reserved;                           \
    } struct_name_mp
     | 
PP RESULT for file top.v : 
vvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvv

^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^

[INFO :CP0300] Compilation...

[INFO :EL0526] Design Elaboration...

[NOTE :EL0508] Nb Top level modules: 0.

[NOTE :EL0509] Max instance depth: 0.

[NOTE :EL0510] Nb instances: 0.

[NOTE :EL0511] Nb leaf instances: 0.

[  FATAL] : 0
[  ERROR] : 0
[WARNING] : 0
[   NOTE] : 4

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*   End SURELOG SVerilog Compiler/Linter   *
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0.15user 0.01system 0:00.23elapsed 70%CPU (0avgtext+0avgdata 39908maxresident)k
13032inputs+8outputs (46major+9624minor)pagefaults 0swaps