Black Parrot Memory End

The Memory End (ME) comprises the Cache Coherence Engines (CCEs), Coherence Network, and L2 Memory in a BlackParrot multicore processor. It can be configured to support one or more CCEs that connect via the Coherence Network to one or more Local Cache Engines (LCEs), which are the L1 entities that participate in coherence.

Diagrams for the ME blocks can be found here

Memory End (ME)

The file bp_me_top.v defines the top level Memory End module. This module is instantiated once per BlackParrot multicore processor. This module instantiates the Coherence Network, CCEs, and L2 memory.

Parameters

• num_lce_p - number of LCEs in the system
• num_cce_p - number of CCEs in the system
• num_mem_p - number of memory units per CCE in the system
• addr_width_p - physical address width
• lce_assoc_p - Associativity of the LCEs
• lce_sets_p - number of Sets in each LCE
• block_size_in_bytes_p - number of bytes per cache block in the LCEs
• num_inst_ram_els_p - size of CCE microcode instruction RAM in number of instructions
• mem_els_p - number of cache block sized memory elements in the simulated memory
• boot_rom_els_p - number of boot ROM words that will be used to initialize simulated memory
• boot_rom_width_p - width of each boot ROM entry

Interfaces

The Memory End instantiates the Coherence Network, which sends messages to and from the LCEs and CCEs in the processor. Inbound messages are routed to the Coherence Network, which then delivers them to either a CCE or another LCE, depending on the type of message. Outbound messages are delivered to the LCEs and may come from either the CCE or another LCE.

• LCE to CCE - ready->valid (ME is helpful consumer)
• CCE to LCE - ready->valid (ME is demanding producer)
• LCE to LCE (inbound) - ready->valid (ME is helpful consumer)
• LCE to LCE (outbound) - ready->valid (ME is demanding producer)

Note: we use the terminology defined in the BaseJump STL paper.

Cache Coherence Engine (CCE)

The Cache Coherence Engine (CCE) is the coherence controller for BlackParrot systems. It implements a directory-based coherence protocol. The file bp_cce_top.v defines the Cache Coherence Engine and instantiates the CCE and exposes a well-defined handshaking interface.

Parameters

• cce_id_p - ID of this CCE in the system
• num_lce_p - number of LCEs in the system
• num_cce_p - number of CCEs in the system
• num_mem_p - number of memory units attached to this CCE (only 1 supported currently)
• addr_width_p - physical address width
• lce_assoc_p - Associativity of the LCEs
• lce_sets_p - number of Sets in each LCE
• block_size_in_bytes_p - number of bytes per cache block in the LCEs
• num_inst_ram_els_p - size of CCE microcode instruction RAM in number of instructions

Interfaces

• LCE to CCE - ready->valid (CCE is helpful consumer)
• CCE to LCE - ready->valid (CCE is demanding producer)
• L2 Mem to CCE - ready->valid (CCE is helpful consumer)
• CCE to L2 Mem - valid->yumi (CCE is helpful producer)
  • This interface is also known as valid->ready

References

1. BaseJump STL