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SURELOG YOSYS FRONTEND BEGIN
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> Converting file "scripts/synth.ys"
read_verilog rtl/omsp_alu.v
read_verilog rtl/omsp_and_gate.v
read_verilog rtl/omsp_clock_gate.v
read_verilog rtl/omsp_clock_module.v
read_verilog rtl/omsp_clock_mux.v
read_verilog rtl/omsp_dbg_hwbrk.v
read_verilog rtl/omsp_dbg_uart.v
read_verilog rtl/omsp_dbg.v
read_verilog rtl/omsp_execution_unit.v
read_verilog rtl/omsp_frontend.v
read_verilog rtl/omsp_mem_backbone.v
read_verilog rtl/omsp_multiplier.v
read_verilog rtl/omsp_register_file.v
read_verilog rtl/omsp_scan_mux.v
read_verilog rtl/omsp_sfr.v
read_verilog rtl/omsp_sync_cell.v
read_verilog rtl/omsp_sync_reset.v
read_verilog rtl/omsp_wakeup_cell.v
read_verilog rtl/omsp_watchdog.v
read_verilog rtl/openMSP430.v
> Ignoring hierarchy
> Converting file "../scripts/generic-fsm.ys"
> Ignoring hierarchy
> Ignoring yosys_proc
> Ignoring opt
> Ignoring memory
> Ignoring opt
> Ignoring fsm
> Ignoring opt
> Ignoring techmap
> Ignoring opt
> Ignoring abc
> Ignoring opt
> Ignoring write_verilog
> Executing: surelog -mt max -parse  -writepp +incdir+.+rtl+sim rtl/omsp_alu.v rtl/omsp_and_gate.v rtl/omsp_clock_gate.v rtl/omsp_clock_module.v rtl/omsp_clock_mux.v rtl/omsp_dbg_hwbrk.v rtl/omsp_dbg_uart.v rtl/omsp_dbg.v rtl/omsp_execution_unit.v rtl/omsp_frontend.v rtl/omsp_mem_backbone.v rtl/omsp_multiplier.v rtl/omsp_register_file.v rtl/omsp_scan_mux.v rtl/omsp_sfr.v rtl/omsp_sync_cell.v rtl/omsp_sync_reset.v rtl/omsp_wakeup_cell.v rtl/omsp_watchdog.v rtl/openMSP430.v
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SURELOG YOSYS FRONTEND END
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