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*  SURELOG System Verilog Compiler/Linter  *
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[INFO :CM0023] Creating log file ./slpp_all/surelog.log.

[INFO :CP0300] Compilation...

[INFO :CP0303] top.sv:2 Compile module "work@sram".

[INFO :CP0302] /home/alain/Surelog/src/dist/surelog/bin/../sv/builtin.sv:4 Compile class "work@mailbox".

[INFO :CP0302] /home/alain/Surelog/src/dist/surelog/bin/../sv/builtin.sv:33 Compile class "work@process".

[INFO :CP0302] /home/alain/Surelog/src/dist/surelog/bin/../sv/builtin.sv:58 Compile class "work@semaphore".

[ERROR:CP0334] top.sv:55 Colliding compilation unit name: "sram",
               top.sv:2 previous usage.

[NOTE :CP0309] top.sv:2 Implicit port type (wire) for "DBUS".

[INFO :EL0526] Design Elaboration...

[NOTE :EL0503] top.sv:2 Top level module "work@sram".

[WARNI:EL0505] top.sv:55 Multiply defined module "work@sram",
               top.sv:2 previous definition.

[NOTE :EL0508] Nb Top level modules: 1.

[NOTE :EL0509] Max instance depth: 1.

[NOTE :EL0510] Nb instances: 1.

[NOTE :EL0511] Nb leaf instances: 0.

[  FATAL] : 0
[  ERROR] : 1
[WARNING] : 1
[   NOTE] : 6

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*   End SURELOG SVerilog Compiler/Linter   *
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0.93user 0.01system 0:00.95elapsed 99%CPU (0avgtext+0avgdata 42952maxresident)k
8inputs+104outputs (0major+14227minor)pagefaults 0swaps
sh: 2: -mt: not found