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foss-fpga-tools/third_party/Surelog/f013e089f9bd4fcbc5ef193ac9a2a69df4c92505/./SVIncCompil/Testcases/YosysTests/frontends/verilog_defaults
tree: df20756b9ef859d9429710c0f0d004b474cf6305
  1. testbench.v
  2. top.v
  3. top1.v