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foss-fpga-tools/third_party/Surelog/f116cd69053c7a7405eeafdcbb0630994483c59d/./SVIncCompil/Testcases/YosysTests/frontends/verilog_lexer_interface_logic
tree: 1844b0467dd540b9492dce02dc3f5eb8ccebda0d
  1. testbench.v
  2. top.v