)]}'
{
  "commit": "41ac3eaeabbded30493b14439965d6b277751430",
  "tree": "25644096e0110243926e62c61609626ac2b34973",
  "parents": [
    "16a9962fb16d50683a7b69835194703c48bc1759"
  ],
  "author": {
    "name": "Elms",
    "email": "elmsfu@freshred.net",
    "time": "Mon Jul 02 14:53:25 2018 -0700"
  },
  "committer": {
    "name": "Elms",
    "email": "elmsfu@freshred.net",
    "time": "Tue Jul 03 11:31:43 2018 -0700"
  },
  "message": "icebox_hlc2asc: Allow data of ram to use verilog literal format\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "c26b173a5e6d5ce8f6425af1111bea440fa8b100",
      "old_mode": 33261,
      "old_path": "icebox/icebox_hlc2asc.py",
      "new_id": "2c1bc832e5e24d33504104de118633d8f2ac6248",
      "new_mode": 33261,
      "new_path": "icebox/icebox_hlc2asc.py"
    }
  ]
}