)]}'
{
  "id": "9cb7ab6848235fd6e8b7d2b3c5442765e9d205a4",
  "repo": "third_party/verible",
  "revision": "0d932004fdff1b39e818664e3e5285aaf7072f5d",
  "path": "verilog/CST/port_test.cc"
}
