)]}'
{
  "id": "4626311665e282e3ff8a9b2351f1b447c1c42b47",
  "repo": "third_party/verible",
  "revision": "1ff4cd03addcbb4bbfa47990bd46bf0f84b8b9de",
  "path": "verilog/analysis/checkers/void_cast_rule.cc"
}
