)]}'
{
  "id": "81a4aed3b5e75e7fe4a653a4820c98d28e7ddabc",
  "repo": "third_party/verible",
  "revision": "1ff4cd03addcbb4bbfa47990bd46bf0f84b8b9de",
  "path": "verilog/preprocessor/BUILD"
}