)]}'
{
  "commit": "2ab333bcb50f4dd9df2e05c7523ac35824ca35f5",
  "tree": "206ef4d969abf8f7766e1675fa96113312b622c0",
  "parents": [
    "f7943f3f93edcb7e26cb32f87c528b96b1e5529c"
  ],
  "author": {
    "name": "Kalen Brunham",
    "email": "kalen.brunham@intel.com",
    "time": "Wed Sep 16 21:02:54 2026 +0000"
  },
  "committer": {
    "name": "Kalen Brunham",
    "email": "kalen.brunham@intel.com",
    "time": "Wed Sep 16 21:02:54 2026 +0000"
  },
  "message": "Move #2352 formatter regression into the issue test file.\n\nKeep formatter_test.cc as the #2602 smoke suite and place the GitHub\nissue cases in formatter_issue_regression_test.cc.\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "8f1fcef4f9dbedbee2907f377cdbf957407842e2",
      "old_mode": 33188,
      "old_path": "verible/verilog/formatting/formatter_issue_regression_test.cc",
      "new_id": "92a392f1b87a4e639be85c11ae20603d7cff166f",
      "new_mode": 33188,
      "new_path": "verible/verilog/formatting/formatter_issue_regression_test.cc"
    },
    {
      "type": "modify",
      "old_id": "894254f6630a8c2727cd0cb9f53dac34678d818b",
      "old_mode": 33188,
      "old_path": "verible/verilog/formatting/formatter_test.cc",
      "new_id": "aad3e60aa81428aa53c8546a0ca04b3fa0e3b54c",
      "new_mode": 33188,
      "new_path": "verible/verilog/formatting/formatter_test.cc"
    }
  ]
}