)]}'
{
  "commit": "3d58646584bff48b3f91e87c06af0616d9f66a8c",
  "tree": "3627fed0b79f601138f2aff80266442b0ef70a2a",
  "parents": [
    "e100aec4f957f3516e035862f8943e6ff023eefc"
  ],
  "author": {
    "name": "hzeller",
    "email": "h.zeller@acm.org",
    "time": "Thu Sep 10 11:21:52 2026 +0000"
  },
  "committer": {
    "name": "hzeller",
    "email": "h.zeller@acm.org",
    "time": "Thu Sep 10 11:21:52 2026 +0000"
  },
  "message": "Deploying to gh-pages from @ chipsalliance/verible@0ff518493ad12b20f300aad4e356ad9219aefbee 🚀\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "86d4d78a2076e6167ab8995b0f274f68b205032d",
      "old_mode": 33188,
      "old_path": "index.md",
      "new_id": "e8dd8290842a2886457001d74923e5390fee8918",
      "new_mode": 33188,
      "new_path": "index.md"
    },
    {
      "type": "modify",
      "old_id": "e18c5b4788c2f4801d3fc9c1a23abffd0a465f86",
      "old_mode": 33188,
      "old_path": "lint.md",
      "new_id": "5856a28df3fe71facdd61705aae9ae7bfc7e2b71",
      "new_mode": 33188,
      "new_path": "lint.md"
    },
    {
      "type": "modify",
      "old_id": "b485535b55c03a9e4f5421c884864519b33e17ff",
      "old_mode": 33188,
      "old_path": "verilog_format.md",
      "new_id": "6154ab509c866c1db4e6b6c3fd7ab7967182a93b",
      "new_mode": 33188,
      "new_path": "verilog_format.md"
    },
    {
      "type": "modify",
      "old_id": "8251044b7d79a4d1b73aa63274859bda13beaf79",
      "old_mode": 33188,
      "old_path": "verilog_lint.md",
      "new_id": "824ba116612c948484010569264eb85f19c47887",
      "new_mode": 33188,
      "new_path": "verilog_lint.md"
    },
    {
      "type": "modify",
      "old_id": "8c8440e2580e07a95236e6e2108de46ac78771a7",
      "old_mode": 33188,
      "old_path": "verilog_syntax.md",
      "new_id": "8aa349b54c1f237a5c8616f179b0988b01a22ce8",
      "new_mode": 33188,
      "new_path": "verilog_syntax.md"
    }
  ]
}