)]}'
{
  "commit": "3e984b8aa2e300b42ba4e32bd49cbd2af0d59d85",
  "tree": "c24125a1d0fe674c4fea229d05285da606295aa0",
  "parents": [
    "9afca2df0a141dd096bbf8f46a0f13ab35278090"
  ],
  "author": {
    "name": "Rafal Kapuscik",
    "email": "rkapuscik@antmicro.com",
    "time": "Tue Jun 01 15:26:42 2021 +0200"
  },
  "committer": {
    "name": "Rafal Kapuscik",
    "email": "rkapuscik@antmicro.com",
    "time": "Wed Jun 09 11:02:38 2021 +0200"
  },
  "message": "Expand coverpoints\n\nSigned-off-by: Rafal Kapuscik \u003crkapuscik@antmicro.com\u003e\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "dced5e66acfa3b748e301614e4a97f83bbf7547a",
      "old_mode": 33188,
      "old_path": "verilog/formatting/tree_unwrapper.cc",
      "new_id": "c9b929f775c70b38811bebe01df13a27fdf4636c",
      "new_mode": 33188,
      "new_path": "verilog/formatting/tree_unwrapper.cc"
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}