diff --git a/verible/verilog/preprocessor/verilog-preprocess.cc b/verible/verilog/preprocessor/verilog-preprocess.cc
index 9c27df6..09189ed 100644
--- a/verible/verilog/preprocessor/verilog-preprocess.cc
+++ b/verible/verilog/preprocessor/verilog-preprocess.cc
@@ -311,7 +311,7 @@
 
   if (config_.expand_macros) {
     verible::MacroCall macro_call;
-    const absl::Status call_status =
+    absl::Status call_status =
         ConsumeAndParseMacroCall(iter, generator, &macro_call, *found);
     if (!call_status.ok()) {
       // Surface a malformed macro call (e.g. an unterminated argument list) as