)]}'
{
  "id": "ab5d03414bb7bfb381f4c209b4a1ee564172964c",
  "repo": "third_party/verible",
  "revision": "4574e85cd2daeaeb49b75b28ed766c326a1ce0d2",
  "path": "verilog/tools/kythe/scope_resolver.h"
}