)]}'
{
  "id": "13bb1e3e6cea0465076ffab9fe99ea268f3e5a6a",
  "repo": "third_party/verible",
  "revision": "4e5e98ea20a4e70f0e116741c13d37f9382825a2",
  "path": "verilog/CST/expression.h"
}
