)]}'
{
  "commit": "54fed9392b403ecbcbbaec5de99fb1ea9040164b",
  "tree": "8cd38e848d6a9808d68a8aac8421d55cb90e8b50",
  "parents": [
    "7e5db121e24142c741f7bf19af3c0affddab0f15"
  ],
  "author": {
    "name": "hzeller",
    "email": "h.zeller@acm.org",
    "time": "Fri Sep 18 15:07:03 2026 +0000"
  },
  "committer": {
    "name": "hzeller",
    "email": "h.zeller@acm.org",
    "time": "Fri Sep 18 15:07:03 2026 +0000"
  },
  "message": "Deploying to gh-pages from @ chipsalliance/verible@a1b0580b9564acf96ca9430897992776b5796eae 🚀\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "115a51b635983709e6b148840b98e875feff5bf0",
      "old_mode": 33188,
      "old_path": "index.md",
      "new_id": "a2eff22319c709f9363b65714c52910e8f520d36",
      "new_mode": 33188,
      "new_path": "index.md"
    },
    {
      "type": "modify",
      "old_id": "81819e9e1ac2b667e6d4184b1a926285476cb416",
      "old_mode": 33188,
      "old_path": "lint.md",
      "new_id": "13673ae30ad07972e47f0585bf1dc91f30267744",
      "new_mode": 33188,
      "new_path": "lint.md"
    },
    {
      "type": "modify",
      "old_id": "ba017cd320b830bf5eedd695cbe1f0f1de1fe2db",
      "old_mode": 33188,
      "old_path": "verilog_format.md",
      "new_id": "97ce579439f1038d96c4fecd4136a3593e3a1f3f",
      "new_mode": 33188,
      "new_path": "verilog_format.md"
    },
    {
      "type": "modify",
      "old_id": "dd276f9254656c46e08fc1f50c7e40524332afb3",
      "old_mode": 33188,
      "old_path": "verilog_lint.md",
      "new_id": "0b17376dccdce88bcf90d2b4a4935b1d134f008a",
      "new_mode": 33188,
      "new_path": "verilog_lint.md"
    },
    {
      "type": "modify",
      "old_id": "f165d66ea7ec7418c5018f9204b1796ffdfe877e",
      "old_mode": 33188,
      "old_path": "verilog_syntax.md",
      "new_id": "5adf893e1878c3ab79d2afefcba50df5c33d31fe",
      "new_mode": 33188,
      "new_path": "verilog_syntax.md"
    }
  ]
}
