)]}'
{
  "id": "81a4aed3b5e75e7fe4a653a4820c98d28e7ddabc",
  "repo": "third_party/verible",
  "revision": "5ae88212c7976b4d5bf93b4df935c79d54985217",
  "path": "verilog/preprocessor/BUILD"
}