)]}'
{
  "commit": "6cbc3b3e870160d3d16c33d978f31fa62290ec56",
  "tree": "c3df9be57a8ccf91d64a5feb1c6b741957bcf9cc",
  "parents": [
    "1e50df0a6a89e5782599c77b1c2facd452e7bb0c"
  ],
  "author": {
    "name": "hzeller",
    "email": "h.zeller@acm.org",
    "time": "Sun Aug 16 07:23:14 2026 +0000"
  },
  "committer": {
    "name": "hzeller",
    "email": "h.zeller@acm.org",
    "time": "Sun Aug 16 07:23:14 2026 +0000"
  },
  "message": "Deploying to gh-pages from @ chipsalliance/verible@1ea007ec87b468595f95b40d095d09551b058b40 🚀\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "21ffbd3add43b6123a540ae39a84f13886455359",
      "old_mode": 33188,
      "old_path": "index.md",
      "new_id": "e104e8a2251e18d1137eac534e9f7bbccf1b10ca",
      "new_mode": 33188,
      "new_path": "index.md"
    },
    {
      "type": "modify",
      "old_id": "7b2f75ab42ab1eaf8755ddbadb004f084bcf5109",
      "old_mode": 33188,
      "old_path": "lint.md",
      "new_id": "ecdc1af631f5cbe65ebdbb79b1164566722d63d5",
      "new_mode": 33188,
      "new_path": "lint.md"
    },
    {
      "type": "modify",
      "old_id": "512e7441d8557d5d7aae4654d6eabc6a2b0945b8",
      "old_mode": 33188,
      "old_path": "verilog_format.md",
      "new_id": "cb7706993240230386c73b5182405bfb400c1278",
      "new_mode": 33188,
      "new_path": "verilog_format.md"
    },
    {
      "type": "modify",
      "old_id": "2a715a265683a8e8ad1d0cfafe0c62059d3d81b9",
      "old_mode": 33188,
      "old_path": "verilog_lint.md",
      "new_id": "2b033e3fc3c6ae1edbcff03db3835992cc9449bf",
      "new_mode": 33188,
      "new_path": "verilog_lint.md"
    },
    {
      "type": "modify",
      "old_id": "cd258b3f63bb0527aab4a1b7fc419b8f342b4184",
      "old_mode": 33188,
      "old_path": "verilog_syntax.md",
      "new_id": "93a7231a49bc78d75c47316517f8fb2a7dbc115d",
      "new_mode": 33188,
      "new_path": "verilog_syntax.md"
    }
  ]
}
