)]}'
{
  "id": "416bc4e4da3cb8b532ab74e6d03639c02da7c9ed",
  "repo": "third_party/verible",
  "revision": "6e3a26f0c13c3d091a5cb7417d38f46a7e2bd930",
  "path": "verilog/CST/expression.h"
}
