)]}'
{
  "id": "a7f66aa3c64f27a32794de8f0d70dea68a7ba0e0",
  "repo": "third_party/verible",
  "revision": "7eb836276c29ec86993b1f67ef577d5512f2ca02",
  "path": "verilog/analysis/checkers/void_cast_rule.cc"
}
