)]}'
{
  "commit": "848feebfe39b2005fdfe074acaa3d33e673c2257",
  "tree": "2240b003cf40abe4a6d2b33b9d40c0e70848124e",
  "parents": [
    "5e00342c1cebdc443bf4cfd593493ff35ea3962f"
  ],
  "author": {
    "name": "Mateusz Sierszulski",
    "email": "msierszulski@antmicro.com",
    "time": "Wed Dec 28 16:31:10 2022 +0100"
  },
  "committer": {
    "name": "Mateusz Sierszulski",
    "email": "msierszulski@antmicro.com",
    "time": "Wed Dec 28 16:31:10 2022 +0100"
  },
  "message": "Add more variants to ClassPropertyColumnSchemaScanner\n\nFixes #1146\n\nSigned-off-by: Mateusz Sierszulski \u003cmsierszulski@antmicro.com\u003e\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "de82da2530dd888ec3e1b4019a04a1aba1e4f574",
      "old_mode": 33188,
      "old_path": "verilog/formatting/align.cc",
      "new_id": "d0b14dd55b212e180e8e4fed176e1c8eaf3d2c60",
      "new_mode": 33188,
      "new_path": "verilog/formatting/align.cc"
    }
  ]
}
