)]}'
{
  "id": "81a4aed3b5e75e7fe4a653a4820c98d28e7ddabc",
  "repo": "third_party/verible",
  "revision": "876c18b0d6f2dd6d476e3f728315260b90b01a5c",
  "path": "verilog/preprocessor/BUILD"
}