)]}'
{
  "commit": "8967f8910912e8e39b8f888c625e5c5eca096020",
  "tree": "297f61ef3c4072912bc8b2ddbba6b8149121063c",
  "parents": [
    "5e00342c1cebdc443bf4cfd593493ff35ea3962f"
  ],
  "author": {
    "name": "Mateusz Sierszulski",
    "email": "msierszulski@antmicro.com",
    "time": "Tue Jan 03 13:27:01 2023 +0100"
  },
  "committer": {
    "name": "Mateusz Sierszulski",
    "email": "msierszulski@antmicro.com",
    "time": "Tue Jan 03 13:47:14 2023 +0100"
  },
  "message": "Add more struct tests with comments\n\nSigned-off-by: Mateusz Sierszulski \u003cmsierszulski@antmicro.com\u003e\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "e61747932132db9e4526fb778fa13973d86548df",
      "old_mode": 33188,
      "old_path": "verilog/formatting/formatter_test.cc",
      "new_id": "e3f08f2c476212de62be4cf78e318390d0e142b3",
      "new_mode": 33188,
      "new_path": "verilog/formatting/formatter_test.cc"
    }
  ]
}