)]}'
{
  "id": "74bcf8c155c574e7295a21c3c1e820fd35e4faf9",
  "repo": "third_party/verible",
  "revision": "8fec6c75f18dc2d88b64474d9490ddf2ffe0ec64",
  "path": "verilog/analysis/checkers/disable_statement_rule.cc"
}
