)]}'
{
  "commit": "94d48b937cc81a8a50f0b8a83e17d26a4cfa1c75",
  "tree": "17b8aacfcdab3fa1f361e40557fcff6f581a194e",
  "parents": [
    "b33cc90019824a8a157f2d5a042912a4b7d67391"
  ],
  "author": {
    "name": "Eylon Krause",
    "email": "eylon1909@gmail.com",
    "time": "Mon Jul 06 17:33:11 2026 +0300"
  },
  "committer": {
    "name": "Eylon Krause",
    "email": "eylon1909@gmail.com",
    "time": "Mon Jul 06 17:33:11 2026 +0300"
  },
  "message": "port-name-suffix: handle `ref` direction and all-underscore names\n\nPortNameSuffixRule crashed the linter on two valid inputs:\n\n- A `ref` port direction: IsSuffixCorrect did suffixes.at(direction) on a map\n  keyed only by input/output/inout, so a `ref` port (allowed by the grammar)\n  threw std::out_of_range, uncaught, aborting the linter. Look the direction\n  up with find() and treat an unknown direction as correct (no violation),\n  matching Violation() which already ignores non-input/output/inout.\n\n- An all-underscore name (e.g. \"_\"): absl::StrSplit with SkipEmpty yields an\n  empty parts list, and the size()\u003c2 branch did not return, so name_parts.back()\n  dereferenced an empty vector (UB). Return after reporting the violation; this\n  also drops a redundant duplicate Violation for no-underscore names.\n\nAdds regression tests: a `ref` port is accepted, and an all-underscore port\nreports a single suffix violation instead of crashing.\n\nSigned-off-by: Eylon Krause \u003ceylon1909@gmail.com\u003e\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "85a0db3d6725065344970954fcb8ab42f612cf2a",
      "old_mode": 33188,
      "old_path": "verible/verilog/analysis/checkers/port-name-suffix-rule.cc",
      "new_id": "3eaf3925d9f39798843099be5f8edb271c3194fb",
      "new_mode": 33188,
      "new_path": "verible/verilog/analysis/checkers/port-name-suffix-rule.cc"
    },
    {
      "type": "modify",
      "old_id": "69f18f41b5ab4c1e4f838660342570e5a1dd0902",
      "old_mode": 33188,
      "old_path": "verible/verilog/analysis/checkers/port-name-suffix-rule_test.cc",
      "new_id": "db69d715eb6288634080cd9e6a5f246dc46be6c0",
      "new_mode": 33188,
      "new_path": "verible/verilog/analysis/checkers/port-name-suffix-rule_test.cc"
    }
  ]
}