)]}'
{
  "id": "416bc4e4da3cb8b532ab74e6d03639c02da7c9ed",
  "repo": "third_party/verible",
  "revision": "a3feb9b5e31b2a454af8200fd5c1dbd36a141ec8",
  "path": "verilog/CST/expression.h"
}
