)]}'
{
  "id": "ac006a3d507e5f00d4565f4758f994d6372a9b46",
  "repo": "third_party/verible",
  "revision": "a3feb9b5e31b2a454af8200fd5c1dbd36a141ec8",
  "path": "verilog/analysis/verilog_analyzer_test.cc"
}
