)]}'
{
  "id": "062b9820f05d7aa0986c0043720bc0332192cc64",
  "repo": "third_party/verible",
  "revision": "aa0c1af6ca93c75457fe7c41c247e4ddd3447fe3",
  "path": "verilog/analysis/checkers/disable_statement_rule.h"
}