)]}'
{
  "id": "416bc4e4da3cb8b532ab74e6d03639c02da7c9ed",
  "repo": "third_party/verible",
  "revision": "ad1018038d43f337d88e79ef2e8d3b58359299a4",
  "path": "verilog/CST/expression.h"
}
