)]}'
{
  "commit": "ae6edd520860559870d3588d050fd45ae40b8c4e",
  "tree": "2f9f216b344cd70c6ea600f9cdc1b3b4dd17c60f",
  "parents": [
    "ce5039624fb4df3d103e6b9891dac411d49d3a82"
  ],
  "author": {
    "name": "Kalen Brunham",
    "email": "kalen.brunham@intel.com",
    "time": "Mon Sep 14 12:56:05 2026 +0000"
  },
  "committer": {
    "name": "Kalen Brunham",
    "email": "kalen.brunham@intel.com",
    "time": "Mon Sep 14 12:56:05 2026 +0000"
  },
  "message": "Add failing CRLF define formatter regression.\n\nIssue #2607: CRLF macro definitions emit a doubled carriage return and fail convergence.\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "16e0572732554441c68f7897fe14122e2e4edeff",
      "old_mode": 33188,
      "old_path": "verible/verilog/formatting/formatter_test.cc",
      "new_id": "f251f9e715b1a00bf1b521ff3ad18bfe71a53a69",
      "new_mode": 33188,
      "new_path": "verible/verilog/formatting/formatter_test.cc"
    }
  ]
}
