)]}'
{
  "id": "91a8c1ab67e87b8e61c3828ccb73d4cced4dfe1b",
  "repo": "third_party/verible",
  "revision": "b22d9c84a7927ad1a7c8185ae5b3f771098ca060",
  "path": "verilog/analysis/BUILD"
}