)]}'
{
  "id": "0c6e44792ba23f81d88c6bb2cbfb1ae1a3c91234",
  "repo": "third_party/verible",
  "revision": "b22d9c84a7927ad1a7c8185ae5b3f771098ca060",
  "path": "verilog/preprocessor/BUILD"
}
