)]}'
{
  "id": "23a90be7d04f828be96f36219042671d66d2fe80",
  "repo": "third_party/verible",
  "revision": "b22d9c84a7927ad1a7c8185ae5b3f771098ca060",
  "path": "verilog/tools/kythe/kythe_proto_output.h"
}
