)]}'
{
  "commit": "b692b6e31288713d1a3aeac7a6ac10ceb985f2d7",
  "tree": "9a9c8de4d0a96b51fb2f449a51322afdd8cbe909",
  "parents": [
    "d70f6321b2cc57b3d9486b4d28e576c7a011c12c"
  ],
  "author": {
    "name": "hzeller",
    "email": "h.zeller@acm.org",
    "time": "Thu Sep 17 08:15:19 2026 +0000"
  },
  "committer": {
    "name": "hzeller",
    "email": "h.zeller@acm.org",
    "time": "Thu Sep 17 08:15:19 2026 +0000"
  },
  "message": "Deploying to gh-pages from @ chipsalliance/verible@9e42238593d57f89393458de7533288733b3a92d 🚀\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "06f1382a1b026d21634e28c75dad06f470b52e7e",
      "old_mode": 33188,
      "old_path": "index.md",
      "new_id": "99e08366342007fa5d8abdd23999068e902fbcae",
      "new_mode": 33188,
      "new_path": "index.md"
    },
    {
      "type": "modify",
      "old_id": "1134a961a538455f3c897c5f89fcb0ab99660da7",
      "old_mode": 33188,
      "old_path": "lint.md",
      "new_id": "3e44e35a51ae5076ac975f71376c11f187bc8a61",
      "new_mode": 33188,
      "new_path": "lint.md"
    },
    {
      "type": "modify",
      "old_id": "71f11f570d30415fce2e8db136c5fdb252fe9689",
      "old_mode": 33188,
      "old_path": "verilog_format.md",
      "new_id": "60f1e66974d784b26c9a5361461be1ab2339617c",
      "new_mode": 33188,
      "new_path": "verilog_format.md"
    },
    {
      "type": "modify",
      "old_id": "97166dcac8c3ff3c42961fe7c2704b83a4b8fde2",
      "old_mode": 33188,
      "old_path": "verilog_lint.md",
      "new_id": "a3b20cdad50bb918829dbd86ef99b43e74153636",
      "new_mode": 33188,
      "new_path": "verilog_lint.md"
    },
    {
      "type": "modify",
      "old_id": "e3cb887fa22d53a5aee71971d895322688f7dced",
      "old_mode": 33188,
      "old_path": "verilog_syntax.md",
      "new_id": "a1f31aa1c595aaeec91a98e99ec15d8bc1621e84",
      "new_mode": 33188,
      "new_path": "verilog_syntax.md"
    }
  ]
}