)]}'
{
  "id": "e8c1ecbbb6c48a201c76f78a30212a30e2b5a996",
  "repo": "third_party/verible",
  "revision": "b895b01318ee9d0ebfa535f309ea14b79e462d18",
  "path": "verilog/CST/expression.cc"
}
