)]}'
{
  "id": "062b9820f05d7aa0986c0043720bc0332192cc64",
  "repo": "third_party/verible",
  "revision": "c2626b84f5d66994200b71d7ed2392d9bde7dfed",
  "path": "verilog/analysis/checkers/disable_statement_rule.h"
}