)]}'
{
  "commit": "c428b43c153fa0708394d76824d00a0e94801683",
  "tree": "c28849e8b92068d5ff4cc0e16a53411b18ac7237",
  "parents": [
    "3daabcac766a06853f38ab043363fd6895d4a822"
  ],
  "author": {
    "name": "Jan Bylicki",
    "email": "jbylicki@antmicro.com",
    "time": "Fri Jan 13 13:42:22 2023 +0100"
  },
  "committer": {
    "name": "Jan Bylicki",
    "email": "jbylicki@antmicro.com",
    "time": "Fri Jan 13 14:01:12 2023 +0100"
  },
  "message": "verilog: parser: verilog_lexical_context: Added delay value tracking\n\nAdded tracking delay values up to next semicolon in\nalways/final/begin/initial statements to avoid misinterpreting the arrow\nas an implication\n\nSigned-off-by: Jan Bylicki \u003cjbylicki@antmicro.com\u003e\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "d6ce73954cff8fa3530ca1317861fb87762ec7ff",
      "old_mode": 33188,
      "old_path": "verilog/parser/verilog_lexical_context.cc",
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      "new_mode": 33188,
      "new_path": "verilog/parser/verilog_lexical_context.cc"
    },
    {
      "type": "modify",
      "old_id": "e17668630deae5ef0155f97ded24c8b843e968ec",
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      "old_path": "verilog/parser/verilog_lexical_context.h",
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}