)]}'
{
  "id": "9cb7ab6848235fd6e8b7d2b3c5442765e9d205a4",
  "repo": "third_party/verible",
  "revision": "c764102bc3f048cd8dc781f28b3d3dabfd17b855",
  "path": "verilog/CST/port_test.cc"
}
