)]}'
{
  "commit": "cb308592efa9e149a48c07fb462d735c1f5e3639",
  "tree": "c3e6cd3a52eca04cc5691537f295ae4d4bda1ac7",
  "parents": [
    "c17eaab629d173849b46c09dcde40157a75f1a90"
  ],
  "author": {
    "name": "Mateusz Sierszulski",
    "email": "msierszulski@antmicro.com",
    "time": "Fri Dec 30 10:57:09 2022 +0100"
  },
  "committer": {
    "name": "Mateusz Sierszulski",
    "email": "msierszulski@antmicro.com",
    "time": "Tue Jan 10 12:05:11 2023 +0100"
  },
  "message": "Add a size check before merging leaves in kDPIImportItem/kDPIExportItem\n\nAlso add test to cover that case.\n\nSigned-off-by: Mateusz Sierszulski \u003cmsierszulski@antmicro.com\u003e\n",
  "tree_diff": [
    {
      "type": "modify",
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      "new_mode": 33188,
      "new_path": "verilog/formatting/formatter_test.cc"
    },
    {
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      "old_id": "ef0b7480ad3dc1cdd140437248f265cc731cf1fe",
      "old_mode": 33188,
      "old_path": "verilog/formatting/tree_unwrapper.cc",
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      "new_path": "verilog/formatting/tree_unwrapper.cc"
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}