)]}'
{
  "id": "0c6e44792ba23f81d88c6bb2cbfb1ae1a3c91234",
  "repo": "third_party/verible",
  "revision": "d122fac8c990ff25b8ecbced33965c0cc8bc3ab5",
  "path": "verilog/preprocessor/BUILD"
}