)]}'
{
  "id": "91a8c1ab67e87b8e61c3828ccb73d4cced4dfe1b",
  "repo": "third_party/verible",
  "revision": "d7c5452eb6ab322bb54752870bfcfc664fa5e3a1",
  "path": "verilog/analysis/BUILD"
}